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本文(DLA SMD-5962-88608 REV A-2004 MICROCIRCUIT DIGITAL FAST CMOS 10-BIT NONINVERTING REGISTER TTL COMPATIBLE INPUTS MONOLITHIC SILICON《硅单片TTL兼容10位放大镜调节快速互补型金属氧化物半导体数字微电路》.pdf)为本站会员(figureissue185)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-88608 REV A-2004 MICROCIRCUIT DIGITAL FAST CMOS 10-BIT NONINVERTING REGISTER TTL COMPATIBLE INPUTS MONOLITHIC SILICON《硅单片TTL兼容10位放大镜调节快速互补型金属氧化物半导体数字微电路》.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Correct the parameters in waveforms, figure 4. Update boilerplate to MIL-PRF-38535 requirements. Editorial changes throughout. - jak 04-01-15 Thomas M. Hess REV SHET REV SHET REV STATUS REV A A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6

2、7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Monica L. Poelking DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Ray Monnin COLUMBUS, OHIO 43216 http:/www.dscc.dla.mil APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, FAST CMOS, 10-BIT NONINVERTING REGISTER, TTL THIS DRAWING IS

3、AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 88-11-28 COMPATIBLE INPUTS, MONOLITHIC SILICON AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-88608 SHEET 1 OF 14 DSCC FORM 2233 APR 97 5962-E077-04 DISTRIBUTION STATEMENT A. Approved for publ

4、ic release; distribution is unlimited.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88608 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1

5、 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-88608 01 K A Drawing number Device type (s

6、ee 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54FCT821A 10-bit noninverting register, TTL compatible inputs 02 54FCT821B 10-bit noninverting register, TTL co

7、mpatible inputs 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style K GDFP2-F24 or CDFP3-F24 24 Flat pack L GDFP3-T24 or CDIP4-T24 24 Dual-in-line package 3 CQCC1-N28 28 Square chip carrier package

8、 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ Supply voltage range. -0.5 V dc to +6.0 V dc Input voltage range -0.5 V dc to VCC+ 0.5 V dc Output voltage range . -0.5 V dc to VCC+ 0.5 V dc DC input diode current (IIK) -20 mA DC outp

9、ut diode current (IOK). -50 mA DC output current 100 mA Maximum power dissipation (PD) 2/ 500 mW Thermal resistance, junction-to-case (JC). See MIL-STD-1835 Storage temperature range -65C to +150C Junction temperature (TJ) +175C Lead temperature (soldering, 10 seconds) +300C 1.4 Recommended operatin

10、g conditions. Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Maximum low level input voltage (VIL) . 0.8 V dc Minimum high level input voltage (VIH) 2.0 V dc Case operating temperature range (TC). -55C to +125C 1/ All voltages referenced to GND. 2/ Must withstand the added PDdue to short circuit

11、test, e.g.; IOS. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88608 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Gover

12、nment specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the issue of the Department of Defense Index of Specification

13、s and Standards (DoDISS) and supplement thereto, cited in the solicitation. SPECIFICATION DEPARTMENT OF DEFENSE MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. STANDARDS DEPARTMENT OF DEFENSE MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface St

14、andard Electronic Component Case Outlines. HANDBOOKS DEPARTMENT OF DEFENSE MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization D

15、ocument Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable

16、 laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced

17、 by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance

18、 with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certific

19、ation mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline(s). The case ou

20、tline(s) shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching w

21、aveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating te

22、mperature range. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88608 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 3.4 Electrical test requirements.

23、 The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the ma

24、nufacturers PIN may also be marked as listed in MIL-HDBK-103 (see 6.6 herein). For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance

25、 indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance.

26、A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product me

27、ets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of

28、 change to DSCC-VA shall be required in accordance with MIL-PRF-38535, appendix A. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available o

29、nshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88608 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Ele

30、ctrical performance characteristics. Test Symbol Conditions -55C TC +125C VCC= 5.0 V dc 10% unless otherwise specified Group A subgroups Device type Limits Unit Min Max IOH= -300 A 1, 2, 3 All 4.3 High level output voltage VOH VCC = 4.5 V VIL= 0.8 V VIH= 2.0 V IOH= -15 mA 1, 2, 3 All 2.4 V IOL= 300

31、A 1, 2, 3 All 0.2 Low level output voltage VOLVCC= 4.5 V VIL= 0.8 V VIH= 2.0 V IOL= 32 mA 1, 2, 3 All 0.5 V Input clamp voltage VIKVCC= 4.5 V, IIN= -18 mA 1 All -1.2 V High level input current IIHVCC= 5.5 V, VIN= 5.5 V 1, 2, 3 All 5.0 A Low level input current IILVCC= 5.5 V, VIN= GND 1, 2, 3 All -5.

32、0 A High impedance current, output high IOZHVCC= 5.5 V, VIN= 5.5 V 1, 2, 3 All 10.0 A High impedance current, output low IOZLVCC= 5.5 V, VIN= GND 1, 2, 3 All -10.0 A Short circuit output current IOSVCC= 5.5 V 1/ 1, 2, 3 All -75 mA Quiescent power supply current (CMOS inputs) ICCQVIN 0.2 V or VIN 5.3

33、 V VCC= 5.5 V fi= 0 MHz 1, 2, 3 All 1.5 mA Quiescent power supply current (TTL inputs) ICCVCC= 5.5 V VIN= 3.4 V 2/ 1, 2, 3 All 2.0 mA Dynamic power supply current ICCDVCC= 5.5 V, OE = GND VIN 5.3 V or VIN 0.2 V Outputs open, One bit toggling 50% duty cycle 3/ All 0.25 mA/MHz VIN 5.3 V or VIN 0.2 V V

34、CC= 5.5 V, fi= 10 MHz OE = GND Outputs open One bit toggling, 50% duty cycle 1, 2, 3 All 4.0 mA Total power supply current ICC4/ VIN= 3.4 V or VIN= GND VCC= 5.5 V, fi= 10 MHz OE = GND Outputs open One bit toggling, 50% duty cycle 1, 2, 3 All 6.0 mA See footnotes at end of table. Provided by IHSNot f

35、or ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88608 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol

36、 Group A subgroups Device type Limits Unit Conditions -55C TC +125C VCC= 5.0 V dc 10% unless otherwise specified Min Max Functional tests See 4.3.1d 7, 8 All Input capacitance CINSee 4.3.1c 4 All 10 pF Output capacitance COUTSee 4.3.1c 4 All 12 pF 01 12.0 CL= 50 pF 9, 10, 11 02 8.5 ns 01 20.0 Propag

37、ation delay time, CP to Yn tPLH, tPHLRL= 500 See figure 4 OE = low CL= 300 pF 5/ 9, 10, 11 02 16 ns 01 15.0 CL= 50 pF 9, 10, 11 02 9.0 ns 01 25.0 Propagation delay time, output enable, OE to Yn tPZH, tPZLRL= 500 See figure 4 CL= 300 pF 5/ 9, 10, 11 02 16.0 ns 01 18.0 CL= 50 pF 9, 10, 11 02 8.0 ns 01

38、 10.0 Propagation delay time, output disable, OE to Yn tPHZ, tPLZRL= 500 See figure 4 CL= 5.0 pF 5/ 9, 10, 11 02 7.0 ns 01 4.0 Dn to CP setup time ts 9, 10, 11 02 3.0 ns 01 2.0 Dn to CP hold time th 9, 10, 11 02 1.5 ns 01 7.0 CP pulse width tw RL= 500 CL= 50 pF See figure 4 9, 10, 11 02 6.0 ns 1/ No

39、t more than one output should be shorted at one time, and the duration of the short circuit condition should not exceed one second. 2/ TTL driven input (VIN= 3.4 V); all other inputs at VCCor GND. 3/ This parameter is not directly testable, but is derived for use in total power supply calculations.

40、4/ ICC= ICCQ+ (ICCx DHx NT) + (ICCD(fIx NI + fCP/2) Where: DH= Duty cycle for TTL inputs high. NT= Number of TTL inputs at DH. fI= Input frequency in MHz. NI= Number of inputs at fI. fCP= clock frequency in MHz 5/ This parameter is guaranteed, if not tested, to the specified limits.Provided by IHSNo

41、t for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88608 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 Device types 01 and 02 Case outlines K and L 3 Terminal number Term

42、inal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 OE D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 GND CP Y9 Y8 Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 VCC- - - - - - - - - - - - NC OE D0 D1 D2 D3 D4 NC D5 D6 D7 D8 D9 GND NC CP Y9 Y8 Y7 Y6 Y5 NC Y4 Y3 Y2 Y1 Y0 VCC NC = No connection. Terminal d

43、escription Symbol Description Dn (n = 0 to 9) Data inputs CP Clock input Yn (n = 0 to 9) Register outputs OE Output enable control input (active low). FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCU

44、IT DRAWING SIZE A 5962-88608 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 8 DSCC FORM 2234 APR 97 Outputs Inputs Internal External OE CP Dn Qn Yn Function H H L H L H Z Z High Z High Z H L X X X X NC NC Z NC Hold Hold L L L H L H L H Load Load H H L H L H Z Z Load

45、Load L = Low voltage level H = High voltage level Z = High impedance state = Low-to-high transition of the clock X = Irrelevant NC = No change FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A

46、 5962-88608 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 9 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88608 DEFENSE SUPPL

47、Y CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 10 DSCC FORM 2234 APR 97 FIGURE 4. Switching waveforms and test circuit.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88608 DEFENSE SUPPLY

48、CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 11 DSCC FORM 2234 APR 97 NOTES: 1. Diagram shown for input control enable low and input control disable high. 2. Pulse generator for all pulses: tf 2.5 ns, tr 2.5 ns. FIGURE 4. Switching waveforms and test circuit Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88608 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION

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