ImageVerifierCode 换一换
格式:PDF , 页数:11 ,大小:72.43KB ,
资源ID:699281      下载积分:10000 积分
快捷下载
登录下载
邮箱/手机:
温馨提示:
如需开发票,请勿充值!快捷下载时,用户名和密码都是您填写的邮箱或者手机号,方便查询和重复下载(系统自动生成)。
如填写123,账号就是123,密码也是123。
特别说明:
请自助下载,系统不会自动发送文件的哦; 如果您已付费,想二次下载,请登录后访问:我的下载记录
支付方式: 支付宝扫码支付 微信扫码支付   
注意:如需开发票,请勿充值!
验证码:   换一换

加入VIP,免费下载
 

温馨提示:由于个人手机设置不同,如果发现不能下载,请复制以下地址【http://www.mydoc123.com/d-699281.html】到电脑端继续下载(重复下载不扣费)。

已注册用户请登录:
账号:
密码:
验证码:   换一换
  忘记密码?
三方登录: 微信登录  

下载须知

1: 本站所有资源如无特殊说明,都需要本地电脑安装OFFICE2007和PDF阅读器。
2: 试题试卷类文档,如果标题没有明确说明有答案则都视为没有答案,请知晓。
3: 文件的所有权益归上传用户所有。
4. 未经权益所有人同意不得将文件中的内容挪作商业或盈利用途。
5. 本站仅提供交流平台,并不能对任何下载内容负责。
6. 下载文件中如有侵权或不适当内容,请与我们联系,我们立即纠正。
7. 本站不保证下载资源的准确性、安全性和完整性, 同时也不承担用户因使用这些下载资源对自己和他人造成任何形式的伤害或损失。

版权提示 | 免责声明

本文(DLA SMD-5962-88621 REV C-2008 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED SCHOTTKY TTL QUADRUPLE 2-INPUT EXCLUSIVE-OR-GATE MONOLITHIC SILICON《高级肖特基TTL系列(ALS)双极数字微电路的四路二输入异或门与单片硅的详细规范》.pdf)为本站会员(jobexamine331)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-88621 REV C-2008 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED SCHOTTKY TTL QUADRUPLE 2-INPUT EXCLUSIVE-OR-GATE MONOLITHIC SILICON《高级肖特基TTL系列(ALS)双极数字微电路的四路二输入异或门与单片硅的详细规范》.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes IAW NOR 5962-R254-92. Change Table I, output current from -30 mA to -20 mA minimum. Editorial changes throughout. - tn 92-07-10 Monica L. Poelking B Update to reflect latest changes in format and requirements. Editorial changes throughout

2、. - les 00-11-30 Raymond Monnin C Update drawing to current requirements. Editorial changes throughout. - gap 08-06-20 Robert M. Heber The original first sheet of this drawing has been replaced. REV SHET REV SHET REV STATUS REV C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPAR

3、ED BY Larry T. Gauder DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Ray Monnin COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED SCHOTTKY TTL, QUADRUPLE,

4、 2-INPUT AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 88-05-03 EXCLUSIVE-OR-GATE, MONOLITHIC SILICON AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-88621 SHEET 1 OF 10 DSCC FORM 2233 APR 97 5962-E131-08 Provided by IHSNot for ResaleNo reproduction or networking permitted wi

5、thout license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88621 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcirc

6、uits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-88621 01 C X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the

7、 circuit function as follows: Device type Generic number Circuit function 01 54ALS86 Quadruple, 2-input Exclusive-OR-Gates 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style C GDIP1-T14 or CDIP2-T

8、14 14 Dual-in-line D GDFP1-F14 or CDFP2-F14 14 Flat package 2 CQCC1-N20 20 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ Supply voltage . -0.5 V dc to +7.0 V dc Input voltage -1.2 V dc at -18mA to +7.0 V

9、 dc Storage temperature range . -65C to +150C Maximum power dissipation (PD) 2/ . 32.45 mW Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) . +4.5

10、 V dc to +5.5 V dc Minimum high-level input voltage (VIH)+2.0 V dc Maximum low level input voltage (VIL): TC= +125C . 0.7 V dc TC= -55C 0.8 V dc TC= +25C . 0.8 V dc Case operating temperature range (TC) -55C to +125C _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the d

11、evice. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Maximum power dissipation is defined as VCCx ICC, and must withstand the added PDdue to short circuit test; e.g., I0. Provided by IHSNot for ResaleNo reproduction or networking permitted without licens

12、e from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88621 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks

13、 form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEF

14、ENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are

15、available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of

16、 this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class

17、 level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance wit

18、h the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. T

19、hese modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be

20、as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 L

21、ogic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance charact

22、eristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. Provided by IHSNot fo

23、r ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88621 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendi

24、x A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Ce

25、rtification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option

26、 is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall

27、 affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.

28、8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore do

29、cumentation shall be made available onshore at the option of the reviewer. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall

30、 be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be mad

31、e available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test param

32、eters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-8

33、8621 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TC+125C 4.5 V VCC 5.5 V Group A subgroups Limits Unit unless otherwise specified Min Max High level output volt

34、age VOH IL= 0.7 V 2 2.5 V VCC= +4.5 V, IOH= -0.4 mA, VIH= +2.0 V 2/ VIL= 0.8 V 1, 3 2.5 V Low level output voltage VOL IL= 0.7 V 2 0.4 V VCC= +4.5 V, VIH= +2.0 V, IOL= 4 mA 2/ VIL= 0.8 V 1, 3 0.4 V Input clamp voltage VICIIN= -18 mA, VCC= +4.5 V 1, 2, 3 -1.5 V Low level input current IILVCC= +5.5 V,

35、 VIN= 0.4 V, All other inputs 4.5 V 1, 2, 3 -0.1 mA High level input current IIH1VCC= +5.5 V, All other inputs = 0.0 V VIN= +2.7 V 1, 2, 3 20 A IIH2VCC= +5.5 V, All other inputs = 0.0 V VIN= +7.0 V 1, 2, 3 0.1 mA Output current IOVCC= +5.5 V, 3/ VOUT= 2.25 V 1, 2, 3 -20 -112 mA Supply current ICCVCC

36、= 5.5 V, All inputs = 4.5 V 1, 2, 3 5.9 mA Functional testing See 4.3.1c 4/ 7, 8 tPLH1 9, 10, 11 3 17 ns Propagation delay time, A, B to Y (other input low) tPHL1 9, 10, 11 2 15.5 ns tPLH2 9, 10, 11 3 17 ns Propagation delay time, A, B to Y (other input high) tPHL2 VCC= 4.5 to 5.5 V, CL= 50 pF, RL=

37、500 , See figure 4 5/ 9, 10, 11 2 12 ns 1/ Unused inputs that do not directly control the pin under test must be put at 2.5 V or 0.4 V. No unused inputs shall exceed 5.5 V or go less than 0.0 V. No inputs shall be floated. 2/ All outputs must be tested. In the case where only one input at VILmaximum

38、 or VIHminimum produces the proper state, the test must be performed with each input being selected as the VILmaximum or VIHminimum input 3/ The output conditions have been chosen to produce a current that closely approximates one half of the true short circuit output current, IOS. Not more than one

39、 output will be shorted at a time and the duration of the test condition shall not exceed one second. 4/ Functional tests shall be conducted at input test conditions of GND VIL VOLand VOH VIH VCC. 5/ Propagation delay limits are based on single output switching. Unused inputs = 3.5 V or 0.3 V. Provi

40、ded by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88621 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 Case outlines C and D 2 Terminal number Terminal connec

41、tion 1 1A NC 2 1B 1A 3 1Y 1B 4 2A 1Y 5 2B NC6 2Y 2A 7 GND NC 8 3Y 2B 9 3A 2Y 10 3B GND11 4Y NC 12 4A 3Y13 4B 3A 14 VCC3B 15 NC 16 4Y17 NC 18 4A 19 4B 20 VCCNC = No connection FIGURE 1. Terminal connections. Function table (each gate) Input Output A B Y L L L L H H H L H H H L L = Low voltage level H

42、 = High voltage level FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88621 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 FIGUR

43、E 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88621 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97 NOTES: 1. CLincludes probe and

44、 jig capacitance. 2. All input pulses have the following characteristics: PRR 10 MHz, duty cycle = 50%, tr= tf= 3 ns 1 ns. 3. The outputs are measured one at a time with one input transition per measurement. FIGURE 4. Switching waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction

45、 or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88621 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 9 DSCC FORM 2234 APR 97 TABLE II. Electrical test requirements. MIL-STD-883 test requirements Subgroups (in accordance

46、 with MIL-STD-883, method 5005, table I) Interim electrical parameters (method 5004) - - - - Final electrical test parameters (method 5004) 1*, 2, 3, 7, 8, 9, 10, 11 Group A test requirements (method 5005) 1, 2, 3, 7, 8, 9, 10, 11 Groups C and D end-point electrical parameters (method 5005) 1, 2, 3

47、* PDA applies to subgroup 1. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified

48、in table II herein. b. Subgroups 4, 5, and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroups 7 and 8 shall include verification of the truth table. 4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be as specified in table II herein. b. Steady-state life test conditions, method 1005 of MIL-STD-883. (1) Test condition A or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available t

copyright@ 2008-2019 麦多课文库(www.mydoc123.com)网站版权所有
备案/许可证编号:苏ICP备17064731号-1