DLA SMD-5962-88639 REV D-2010 MICROCIRCUIT DIGITAL FAST CMOS OCTAL TRANSPARENT LATCH WITH THREESTATE OUTPUTS TTL COMPATIBLE MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add device type 02. Add vendor CAGE 27014 and 75569. Add logic diagram. Technical and editorial changes throughout. 91-04-11 M. A. Frye B Changes in accordance with notice of revision 5962-R190-92. - jak 92-06-19 Tim H. Noh C Redraw the switching

2、 waveforms in figure 4, switching waveforms and test circuit. Update the boilerplate to current requirements as specified in MIL-PRF-38535. Editorial changes throughout. jak 06-07-11 Thomas M. Hess D Add footnote 4/ to ICCtest in table I. jak 10-01-06 Thomas M. Hess REV SHET REV SHET REV STATUS REV

3、D D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Marcia B. Kelleher DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Monica L. Poelking THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS

4、APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, FAST CMOS, OCTAL TRANSPARENT LATCH WITH THREE-STATE OUTPUTS, TTL COMPATIBLE, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 88-09-08 AMSC N/A REVISION LEVEL D SIZE A CAGE CODE 67268 5962-88639 SHEET 1 OF 12 DSCC F

5、ORM 2233 APR 97 5962-E073-10 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88639 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. T

6、his drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-88639 01 R ADrawing number Device type (see 1.2.1)

7、Case outline(see 1.2.2)Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54FCT573 Octal transparent latch with three-state outputs, TTL compatible02 54FCT573A Octal transparent latch with three-stat

8、e outputs, TTL compatible 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line S GDFP2-F20 or CDFP3-F20 20 Flat pack 2 CQCC1-N20 20 Square leadless chip carr

9、ier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) . -0.5 V dc to +7.0 V dc DC input voltage range (VIN) 2/ -0.5 V dc to VCC + 0.5 V dc DC output voltage range (VOUT) 2/ . -0.5 V dc to VCC+ 0.5 V dc DC inpu

10、t diode current (IIK) . -20 mA DC output diode current (IOK) -50 mA DC output current (IOUT) 100 mA Maximum power dissipation (PD) 3/ . 500 mW Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Storage temperature range (TSTG) -65C to +150C Junction temperature (TJ) . +175C Lead temperature

11、(soldering, 10 seconds) . +300C 1.4 Recommended operating conditions. Supply voltage range (VCC) . +4.5 V dc to +5.5 V dc Maximum low level input voltage (VIL). 0.8 V dc Minimum high level input voltage (VIH) 2.0 V dc Case operating temperature range (TC) -55C to +125C Minimum setup time, high or lo

12、w (Dn to LE) (ts) 2.0 ns Minimum hold time, high or low (Dn to LE) (th) 1.5 ns Minimum LE pulse width, high or low (tw) 6.0 ns 1/ Unless other wise specified, all voltages are referenced to ground. 2/ For VCC 6.5 V dc, the upper bound is limited to VCC. 3/ Must withstand the added PDdue to short cir

13、cuit test, e.g., IOS. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88639 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1

14、Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECI

15、FICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Stand

16、ard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence

17、. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements

18、. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has

19、been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modification

20、s to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2

21、Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall

22、be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.3 Ele

23、ctrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups spe

24、cified in table II. The electrical tests for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88639 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEV

25、EL D SHEET 4 DSCC FORM 2234 APR 97 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible du

26、e to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced wi

27、th a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein).

28、 The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required i

29、n MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity

30、 retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT

31、 DRAWING SIZE A 5962-88639 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC+125C VCC= 5.0 V dc 10% unless otherwise specified Device type VCCGroup A subgroups Limits

32、 Unit Min Max High level output voltage VOHVIL= 0.8 V VIH= 2.0 V IOH= -300 A All 4.5 V 1, 2, 3 4.3 V VIL= 0.8 V VIH= 2.0 V IOH= -12 mA All 4.5 V 2.4 Low level output voltage VOLVIL= 0.8 V VIH= 2.0 V IOL= 300 A All 4.5 V 1, 2, 3 0.2 V VIL= 0.8 V VIH= 2.0 V IOL= 32 mA All 4.5 V 0.5 Input clamp voltage

33、 VIKIIN= -18 mA All 4.5 V 1 -1.2 V High level input current IIHVIN= 5.5 V All 5.5 V 1, 2, 3 5.0 A Low level input current IILVIN= GND All 5.5 V 1, 2, 3 -5.0 A Short circuit output current IOS1/ All 5.5 V 1, 2, 3 -60 mA Quiescent power supply current (CMOS inputs) ICCQVIN 0.2 V or VIN 5.3 V fi= 0 MHz

34、 All 5.5 V 1, 2, 3 1.5 mA Quiescent power supply current (TTL inputs) ICC2/ VIN= 3.4 V All 5.5 V 1, 2, 3 2.0 mA Dynamic power supply current ICCD3/ 4/ OE = GND, LE = VCCVIN 0.2 V or VIN 5.3 V Outputs open One bit toggling 50% duty cycle All 5.5 V 3/ 0.4 mA/ MHz Total power supply current ICC4/ 5/ OE

35、 = GND, LE = VCCVIN 0.2 V or VIN 5.3 V Outputs open One bit toggling 50% duty cycle fCP= 10 MHz All 5.5 V 1, 2, 3 5.5 mA OE = GND, LE = VCCVIN= 3.4 V or VIN= GND Outputs open Eight bits toggling fCP= 2.5 MHz 50% duty cycle All 5.5 V 1, 2, 3 6.0 mA Input capacitance CINSee 4.3.1c All 4 10 pF Output c

36、apacitance COUTSee 4.3.1c All 4 12 pF Functional tests See 4.3.1d All 7, 8 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88639 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43

37、218-3990 REVISION LEVEL D SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions -55C TC+125C VCC= 5.0 V dc 10% unless otherwise specified Device type VCCGroup A subgroups Limits Unit Min Max Propagation delay time, Dn to On tPLH1, tPHL16/ CL=

38、 50 pF RL= 500 See figure 4 01 4.5 V 9, 10, 11 1.0 8.5 ns 02 1.0 5.6Propagation delay time, LE to On tPLH2, tPHL26/ 01 4.5 V 9, 10, 11 1.0 15.0 ns 02 1.0 9.8Propagation delay time, output enable, OE to On tPZH, tPZL6/ 01 4.5 V 9, 10, 11 1.0 13.5 ns 02 1.0 7.5Propagation delay time, output disable, O

39、E to On tPLZ, tPHZ6/ 01 4.5 V 9, 10, 11 1.0 10.0 ns 02 1.0 6.51/ Not more than one output should be shorted at one time and the duration of the short circuit condition should not exceed 1 second. 2/ In accordance with TTL driven input (VIN= 3.4 V); all other inputs at VCCor GND. 3/ This parameter is

40、 not directly testable but is derived for use in total power supply calculations. 4/ For ICCtests, in an ATE environment, the effect of parasitic output capacitive loading from the test environment must be taken into account,as its effect is not intended to be included in the test results. The impac

41、t must be characterized and appropriate offset factors must be applied to the test result.“ 5/ ICC= ICCQ+ (ICCx DHx NT) + (ICCDx fI x NI), where: DH= Duty cycle for TTL inputs at DH. NT= Number of TTL inputs high. fI= Input frequency in MHz. NI= Number of inputs at fI. 6/ Minimum limits shall be gua

42、ranteed, if not tested, to the limits specified in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88639 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 22

43、34 APR 97 Device types 01 and 02 Case outlines R, S, and 2 Terminal number Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 OE D0 D1 D2 D3 D4 D5 D6 D7 GND LE O7 O6 O5 O4 O3 O2 O1 O0 VCCFIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permit

44、ted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88639 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 8 DSCC FORM 2234 APR 97 Inputs Outputs Dn LE OE On H H L H L H L L X X H Z L = Low voltage level H = High voltage level X = Irrelevant Z =

45、High impedance FIGURE 2. Truth table. FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88639 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 9 DSCC FORM

46、 2234 APR 97 FIGURE 4. Switching waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88639 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 10 DSCC FORM

47、2234 APR 97 NOTES: 1. When measuring tPLH, tPHL, tPZH, and tPHZ: S1 = Open. When measuring tPLZand tPZL: S1 = 7V. 2. RL= 500 or equivalent. 3. RT= 50 or equivalent, terminal resistance which should be equal to ZOUTof the pulse generator. 4. CL= 50 pF or equivalent (includes test jig and probe capaci

48、tance). 5. Pulse generator for all pulses: tr 2.5 ns; tf 2.5 ns. FIGURE 4. Switching waveforms and test circuit Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88639 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 11 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures