DLA SMD-5962-88657 REV B-2012 MICROCIRCUIT DIGITAL FAST CMOS SYNCHRONOUS PRESETTABLE BINARY COUNTER TTL COMPATIBLE MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add device types 03 and 04. Add vendor CAGE 61772 for device types 03 and 04. Delete vendor CAGE 61772 for device type 01 and 02. Technical and editorial changes throughout. 92-10-14 Monica L. Poelking B Drawing updated to reflect current MIL-PRF

2、-38535 requirements. Redrawn. - jak 12-12-18 Thomas M. Hess REV SHEET REV B SHEET 15 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Marcia Kelleher DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STAN

3、DARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY Daniel A. DiCenzo APPROVED BY Donald R. Cool MICROCIRCUIT, DIGITAL, FAST CMOS SYNCHRONOUS PRESETTABLE BINARY, COUNTER, TTL COMPATIBLE, MONOLITHIC SILICON DRAWING APPROV

4、AL DATE 88-09-30 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-88657 SHEET 1 OF 15 DSCC FORM 2233 APR 97 5962-E036-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88657 DLA LAND AND MARITIME COLUMB

5、US, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as

6、shown in the following example: 5962-88640 01 E A Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 1/ 54FCT163 Synchronous presetta

7、ble binary counter, TTL compatible 02 1/ 54FCT163A Synchronous presettable binary counter, TTL compatible 03 54FCT163 Synchronous presettable binary counter, TTL compatible 04 54FCT163A Synchronous presettable binary counter, TTL compatible 1.2.2 Case outline(s). The case outline(s) are as designate

8、d in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-F16 16 dual-in-line F GDIP1-F16 or CDFP2-F16 16 flat package 2 CQCC1-N20 20 square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1/ Due

9、 to internal noise problems, device types 01 and 02 do not meet the minimum VIHthreshold limits characteristic of the FCT family or the limits specified on this drawing. The device type is no longer available for acquisition. Provided by IHSNot for ResaleNo reproduction or networking permitted witho

10、ut license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88657 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) . -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC +

11、0.5 V dc 2/ DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc 2/ DC input diode current (IIK) . -20 mA DC output diode current (IOK) -50 mA DC output current (IOUT) 100 mA Maximum power dissipation (PD) 500 mW 3/ Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Storage temperatur

12、e range (TSTG) -65C to +150C Junction temperature (TJ) . +175C Lead temperature (soldering, 10 seconds) . +300C 1.4 Recommended operating conditions. Supply voltage range (VCC) . +4.5 V dc to +5.5 V dc Maximum low level input voltage (VIL). 0.8 V dc Minimum high level input voltage (VIH) Device type

13、 01 and 02 2.0 V dc 4/ Device type 03 and 04 3.0 V dc 4/ Case operating temperature range (TC) -55C to +125C Minimum setup time, high or low (Pn to CP) (ts1): Device types 01 and 02 5.5 ns Device type 03 and 04 4.5 ns Minimum setup time, high or low (CEP, CET to CP) (ts2): Device types 01 and 02 13.

14、0 ns Device types 03 and 04 11.0 ns Minimum hold time, high or low (Pn to CP) (th1) 2.0 ns Minimum hold time, high or low (CEP, CET to CP) (th2) 0.0 ns Minimum CP pulse width, high, low (load) (tw1): Device types 01 and 02 5.0 ns Device types 03 and 04 4.0 ns Minimum CP pulse width, high, low (count

15、) (tw2): Device types 01 and 02 8.0 ns Device types 03 and 04 7.0 ns Minimum setup time, high or low (SR, PE to CP) (ts3): Device types 01 and 02 13.5 ns Device types 03 and 04 11.5 ns Maximum hold time (SR, PE) to CP (th3): Device types 01, 02, 03, and 04 . 1.5 ns _ 1/ All voltages are referenced t

16、o ground. 2/ For VCC 6.5 V dc, the upper bound is limited to +7.0 V. 3/ Must withstand the added PDdue to short circuit test, e.g., IOS. 4/ For dynamic operation of device types 03 and 04, a VIHlevel between 2.0 V and 3.0 V may be recognized by this device as a high logic level input. For static ope

17、ration of device types 03 and 04, a VIH 2.0 V will be recognized by these devices as a high logic level input. Users are cautioned to verify that this change will not affect their system. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICRO

18、CIRCUIT DRAWING SIZE A 5962-88657 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the ex

19、tent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Meth

20、od Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.dla.

21、mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in

22、 this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein.

23、Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan

24、and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PI

25、N as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A a

26、nd herein. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table(s). The truth table(s) shall be as specified on figure 2. 3.2.4 Logic diagram(s). The logic diagra

27、m(s) shall be as specified on figure 3. 3.2.5 Counting sequence. The counting sequence shall be as specified on figure 4. 3.2.6 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 5. 3.3 Electrical performance characteristics. Unless otherwi

28、se specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each s

29、ubgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88657 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 3.5 Marking. Marking shal

30、l be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of n

31、ot marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-

32、PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Mar

33、itime -VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provi

34、ded with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritimes agent, and the acquirin

35、g activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MI

36、CROCIRCUIT DRAWING SIZE A 5962-88657 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C VCC= 5.0 V dc 10% unless otherwise specified Device type VCCGroup A subgroups Limi

37、ts Unit Min Max High level output voltage VOH1VIL= 0.8 V VIH= 2.0 V IOH= -300 A 01, 02 4.5 V 1, 2, 3 4.3 V VIL= 0.8 V VIH= 2.0 V IOH= -12 mA 01, 02 4.5 V 2.4 VOH21/ VIL= 0.8 V VIH= 3.0 V IOH= -300 A 03, 04 4.5 V 1, 2, 3 4.3 V VIL= 0.8 V VIH= 3.0 V IOH= -12 mA 03, 04 4.5 V 2.4 Low level output voltag

38、e VOL1VIL= 0.8 V VIH= 2.0 V IOL= 300 A 2/ 01, 02 4.5 V 1, 2, 3 0.2 V VIL= 0.8 V VIH= 2.0 V IOL= 32 mA 01, 02 4.5 V 0.5 VOL21/ VIL= 0.8 V VIH= 3.0 V IOL= 300 A 2/ 03, 04 4.5 V 1, 2, 3 0.2 V VIL= 0.8 V VIH= 3.0 V IOL= 32 mA 03, 04 4.5 V 0.5 Input clamp voltage VIKIIN= -18 mA All 4.5 V 1 -1.2 V High le

39、vel input current IIHVIN= 5.5 V All 5.5 V 1, 2, 3 5.0 A Low level input current IILVIN= GND All 5.5 V 1, 2, 3 -5.0 A Short circuit output current IOS3/ All 5.5 V 1, 2, 3 -60 mA Quiescent power supply current (CMOS inputs) ICCQVIN 0.2 V or VIN 5.3 V fi= fCP= 0 MHz All 5.5 V 1, 2, 3 1.5 mA Quiescent p

40、ower supply current (TTL inputs) ICC4/ VIN= 3.4 V All 5.5 V 1, 2, 3 2.0 mA Dynamic power supply current ICCD5/ VIN 0.2 V or VIN 5.3 V SR = VCCOutputs open, one bit toggling 50% duty cycle fI= 5 MHz, fCP= 1- MHz CEP = CET = PE = GND All 5.5 V 3/ 0.25 mA/ MHz See footnotes at end of table. Provided by

41、 IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88657 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol

42、 Conditions -55C TC +125C VCC= 5.0 V dc 10% unless otherwise specified Device type VCCGroup A subgroups Limits Unit Min Max Total power supply current ICC6/ fCP= 10 MHz SR = VCC, outputs open, VIN 5.3 V or VIN 0.2 V One bit toggling at fi= 5 MHz 50% duty cycle PE = CET = CEP = GND All 5.5 V 1, 2, 3

43、4.0 mA fCP= 10 MHz SR = VCC, outputs open, VIN 3.4 V or VINGND One bit toggling at fi= 5 MHz 50% duty cycle PE = CET = CEP = GND All 5.5 V 1, 2, 3 6.0 mA fCP= 10 MHz SR = VCC, outputs open, VIN 5.3 V or VIN 0.2 V Four bits toggling at fi= 5 MHz 50% duty cycle PE = CET = CEP = GND 7/ All 5.5 V 1, 2,

44、3 7.8 mA fCP= 10 MHz SR = VCC, outputs open, VIN 3.4 V or VINGND Four bits toggling at fi= 5 MHz 50% duty cycle PE = CET = CEP = GND 7/ All 5.5 V 1, 2, 3 12.8 mA Input capacitance CINSee 4.3.1c All 4 10 pF Output capacitance COUTSee 4.3.1c All 4 12 pF Functional tests 8/ See 4.3.1d All 7, 8 Propagat

45、ion delay time, CP to Qn (PE input high) tPLH1, tPHL19/ CL= 50 pF minimum RL= 500 See figure 5 01, 03 4.5 V 9, 10, 11 2.0 11.5 ns 02, 04 4.5 V 2.0 7.5 Propagation delay time, CP to Qn (PE input low) tPLH2, tPHL29/ 01, 03 4.5 V 9, 10, 11 2.0 10.0 ns 02, 04 4.5 V 2.0 6.5 Propagation delay time, CP to

46、TC tPLH3, tPHL39/ 01, 03 4.5 V 9, 10, 11 2.0 16.5 ns 02, 04 4.5 V 2.0 10.8 Propagation delay time, CET to TC tPLH4, tPHL49/ 01, 03 4.5 V 9, 10, 11 1.5 9.0 ns 02, 04 4.5 V 1.5 6.5 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from

47、IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88657 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. 1/ For dynamic operation of device types 03 and 04, a VIH level between 2.0 V and 3.0 V ma

48、y be recognized by this device as a high logic level input. For static operation of device types 03 and 04 a VIH 2.0 V will be recognized by these devices as a high logic level input. Users are cautioned to verify that this change will not affect their system. 2/ Guaranteed by testing at worst case condition of VCC= 3 volts. 3/ Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed 1 second. 4/ In accordance with TTL driven input (VIN= 3.4 V dc); all other outputs at VCCor GND. 5/ This parameter is not directly testable,