DLA SMD-5962-88671 REV B-2011 MICROCIRCUIT DIGITAL HIGH SPEED CMOS 4-BIT BINARY UP DOWN COUNTER WITH TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add logic diagram. Add test circuit and notes to figure 4, switching waveforms and test circuit. Update boilerplate to MIL-PRF-38535 requirements. - LTG 05-06-14 Thomas M. Hess B Update boilerplate paragraphs to the current MIL-PRF-38535 requirem

2、ents. - LTG 11-11-17 Thomas M. Hess REV SHET REV B SHET 15 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY D. A. DiCenzo DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING TH

3、IS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY Charles Reusing APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, HIGH-SPEED CMOS, 4-BIT BINARY UP/DOWN COUNTER WITH TTL COMPATIBLE INPUTS, MONOLITHIC SILICON DRAWING APPROVAL DATE 88-07

4、-19 REVISION LEVEL B SIZE A CAGE CODE 67268 5962-88671 SHEET 1 OF 15 DSCC FORM 2233 APR 97 5962-E008-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88671 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 RE

5、VISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following

6、 example: 5962-88671 01 E A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54HCT191 Presettable synchronous 4-bit binary up/ down co

7、unter with TTL compatible inputs 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, ap

8、pendix A. 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC+ 0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc Clamp diode current (IIK, IOK) 20 mA DC output current (per pin) (IOUT) . 25 mA DC VC

9、Cor GND current (per pin) (ICC, IGND) . 50 mA Storage temperature range (TSTG) -65C to +150C Maximum power dissipation (PD) . 500 mW 4/ Lead temperature (soldering, 10 seconds) . +260C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) . +175C 1/ Stresses above th

10、e absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise specified, all voltages are referenced to ground. 3/ The limits for the parameters specified herein shall apply over the fu

11、ll specified VCCrange and case temperature range of -55C to +125C. 4/ For TC= +100C to +125C, derate linearly at 8 mW/C. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88671 DLA LAND AND MARITIME COLUMBUS, O

12、HIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Case operating temperature range (TC) . -55C to +125C Input rise or fall time (tr, tf): VCC= 4.5 V . 0 to 500 ns Minimum setup time, Pn to PL or CE to

13、 CP (ts): TC= +25C: VCC= 4.5 V 12 ns TC= -55C and +125C: VCC= 4.5 V 18 ns Minimum setup time, U/D to CP (ts): TC= +25C: VCC= 4.5 V 18 ns TC= -55C and +125C: VCC= 4.5 V 27 ns Minimum hold time, Pn to PL or CE to CP (th): TC= +25C: VCC= 4.5 V 2.0 ns TC= -55C and +125C: VCC= 4.5 V 2.0 ns Minimum hold t

14、ime, U/D to CP (th): TC= +25C: VCC= 4.5 V 0.0 ns TC= -55C and +125C: VCC= 4.5 V 0.0 ns Maximum clock frequency (fMAX): TC= +25C: VCC= 4.5 V 30 MHz TC= -55C and +125C: VCC= 4.5 V 20 MHz Minimum recovery time (tREC): TC= +25C: VCC= 4.5 V 12 ns TC= -55C and +125C: VCC= 4.5 V 18 ns Minimum clock pulse w

15、idth (tW): TC= +25C: VCC= 4.5 V 16 ns TC= -55C and +125C: VCC= 4.5 V 24 ns Minimum PL pulse width (tW): TC= +25C: VCC= 4.5 V 20 ns TC= -55C and +125C: VCC= 4.5 V 30 ns Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE

16、 A 5962-88671 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herei

17、n. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcir

18、cuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch

19、/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents cited in

20、 the solicitation or contract. JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEDEC Standard No. 7 - Standard for Description of 54/74HCXXXXX and 54/74HCTXXXXX Advanced High-Speed CMOS Devices. (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Technol

21、ogy Association, 3103 North 10thStreet, Suite 240-S Arlington, VA 22201). 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and

22、 regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qua

23、lified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL

24、-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mar

25、k in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shal

26、l be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. Provided by IHSNot for ResaleN

27、o reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88671 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shal

28、l be as specified on figure 4. 3.2.6 Counting sequence. The counting sequence shall be as specified on figure 5. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case op

29、erating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be m

30、arked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance m

31、ark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificat

32、e of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply shall affir

33、m that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Noti

34、fication of change. Notification of change to DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and

35、applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88671 DLA LAND AND MARITIME COLUMBUS, O

36、HIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Test conditions 1/ -55C TC+125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max High level output voltage VOHVIN= VIHor VILIOH= -20 A VCC= 4.5 V 1,

37、2, 3 All 4.4 V VIN= VIHor VILIOH= -4.0 mA VCC= 4.5 V 1, 2, 3 All 3.7 V Low level output voltage VOLVIN= VIHor VILIOL= +20 A VCC= 4.5 V 1, 2, 3 All 0.1 V VIN= VIHor VILIOL= +4.0 mA VCC= 4.5 V 1, 2, 3 All 0.4 V High level input voltage 2/ VIHVCC= 4.5 V 1, 2, 3 All 2.0 V Low level input voltage 2/ VILV

38、CC= 4.5 V 1, 2, 3 All 0.8 V Input leakage current IINVCC= 5.5 V, VIN= VCCor GND 1, 2, 3 All 1.0 A Quiescent supply current ICCVCC= 5.5 V, VIN= VCCor GND 1, 2, 3 All 160 A Additional quiescent supply current ICCVIN = 2.4 V or 0.5 V, any 1 input VIN= VCCor GND, other inputs VCC= 5.5 V 1, 2, 3 All 3.0

39、mA Input capacitance CINVIN= 0.0 V, TC= +25C See 4.3.1c 4 All 10 pF Functional tests See 4.3.1d 7 All Propagation delay time, PL to Qn tPHL1, tPLH1 VCC= 5.0 V 10% CL= 50 pF 10% tr, tf= 6.0 ns See figures 4 and 5 9 All 40 ns 10, 11 60 Propagation delay time, Pn to Qn tPHL2, tPLH29 All 38 ns 10, 11 57

40、 Propagation delay time, CP to Qn tPHL3, tPLH39 All 35 ns 10, 11 53 Propagation delay time, CP to RC tPHL4, tPLH49 All 27 ns 10, 11 41 Propagation delay time, CP to TC tPHL5, tPLH59 All 42 ns 10, 11 63 Propagation delay time, U/D to RC tPHL6, tPLH69 All 30 ns 10, 11 45 Propagation delay time, U/D to

41、 TC tPHL7, tPLH79 All 38 ns 10, 11 57 Propagation delay time, CE to RC tPHL8, tPLH89 All 27 ns 10, 11 41 Transition time, Qn, TC, or RC 3/ tTLH, tTHL9 All 15 ns 10, 11 22 1/ For a power supply of 5.0 V 10%, the worst case output voltage (VOHand VOL) occur for HCT at VCC= 4.5 V. Thus, the 4.5 V value

42、s should be used when designing with this supply. Worst case VIHand VILoccur at VCC= 5.5 V and 4.5 V, respectively. 2/ Test not required if applied as a forcing function for VOHor VOL. 3/ Transition time (tTLH, tTHL), if not tested, shall be guaranteed to the limits specified in table I. Provided by

43、 IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88671 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 Device type All Case outline E Terminal number Terminal symbol 1 2 3 4

44、 5 6 7 8 9 10 11 12 13 14 15 16 P1Q1Q0CE U/D Q2Q3GND P3P2PL TC RC CP P0VCCFIGURE 1. Terminal connections. Inputs 1/ Function PL CE U/D CP H L L Count up H L H Count down L X X X Asynchronous preset H H X X No change 1/ U/D or CE should be changed only when clock is high. H = High voltage level L = L

45、ow voltage level X = Irrelevant = Low to high clock transition FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88671 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHE

46、ET 8 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88671 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 9 DSCC FORM 2234 APR 97 FIGURE

47、3. Logic diagram Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88671 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 10 DSCC FORM 2234 APR 97 FIGURE 4. Switching waveforms

48、and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88671 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 11 DSCC FORM 2234 APR 97 FIGURE 4. Switching waveforms and test circuit Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,