DLA SMD-5962-88675-1988 MICROCIRCUITS DIGITAL FAST CMOS 8-BIT NONINVERTING BUS INTERFACE LATCH TTL COMPATIBLE MONOLITHIC SILICON《硅单片8位扬声器TTL兼容总线接口锁存器输入快速互补型金属氧化物半导体数字微电路》.pdf

1、DESC-DWG-8675 57 7777775 OOL3700 7 9 REV SHEET REV I SHEET REV STATUS REV OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 I i r-sa-33 10 11 12 13 14 PMIC NA STANDARDIZED MILITARY DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPAmEMS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC NIA 6 SEPTEMBER 1988 DEFENSE E

2、LECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 MICROCIRCUITS, DIGITAL, FAST CMOS, 8-BIT NONINVERTING BUS INTERFACE LATCH, TTL COMPATIBLE, MONOLITHIC SILICON CAGE CODE SIZE A I 67268 SHEET 1 OF 14 DESC FORM 193 SEP 87 t U.S. 00ViIWMENT PIHTIiiG WFKI: 1987 - 748-119/60911 5962-E964 DiSTRIBUTION STATEMENT

3、 A. Approved for public release; disiribution Is unlimited. /f Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-1. SCOPE 1.1 Scope. This drawing describes device requirements for class B microcircuits in accordance with 12.1 of MIL-STD-883, “Provision

4、s for the use of MIL-STD-883 in conjunction with compliant non-JAN devices“, 1.2 Part number, The complete part number shall be as shown in the following example: 5962-88675 o1 K X T 7- i Drawing number i Dev ce (:.2.;jpe i Case outline (1.2.2) i Lead in s -L5sF 1.2.1 Device types. The device types

5、shall identify the circuit function as follows: Device type Generic number Circuit function o1 54FCT845A 8-bit noninverting bus interface latch, TTL compatible 02 54FCT845B 8-bit noninverting bus interface latch, TTL compatible 1.2.2 Case outlines. The case outlines shall be as designated in appendi

6、x C of MIL-M-38510, and as. fol 1 ows: Outline letter Case outline K L 3 F-6 (24-lead, ,640“ x ,420“ x .090“1, flat package D-9 (24-leadS 1.280“ x ,310“ x .200“), dual-in-line package C-4 (2-terminal, .460“ x ,460“ x .100“), square chip carrier package 1.3 Absolute maximum ratings. J . Supply voltag

7、e range (VCC) - - - - - - - - - - - - - Input voltage range - - - - - - - - - - - - - - - - Output voltage range - - - - - - - - - - - - - - - - RC input dfode current (I K) - - - - - - - - - - - - DC output diode current (!OJO - - - - - - - - - - - DC output current - - - - - - - - - - - - - - - -

8、- Maximum power dissipation (Po) 2/ - - - - - - - - - Thermal resistance, junction-torcase (Qc) : Cases K, L, and 3 . - - - - . - - - - - - - - - - Storage temperature range - - - - - - - - - - - - - Junction temperature (TJ) - - - - - - - - - - - - - Lead temperature (soldering, 10 seconds) - - - -

9、 - - -0.5 V dc to t6.0 V dc -0.5 V dc to Vcc t0.5 V dc -0.5 V dc to VcC t0.5 V dc +20 mR *50 mA *lo0 mA 500 mW See MIL-M-38510, appendix C -65“s to *150eC *I75 C +30O0C I/ c Ali voltages referenced to GND. - 2/ Must withstand the added PD due to short circuit test; e.g., 10s. - - SEE 5962-88675 A ST

10、ANDARDIZED MILtTARY DRAWING 1- 2 ELEcTRoNm SUPPLY CENTER Ch4YWi OH0 45444 * u.a.wEANuew PNMM OFFICE: iwb-a(eoo1 iESG FORM 193A SEP 87 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DESC-DWG-b75 57 W 7777775 0013702 O 1.4 Recommended operating condit

11、ions. Supply voltage (Vcc) - - - - - - - - - - - - - - - - Maximum logic low voltage (VIL) - - - - - - - - - - Minimum logic high voltage (VI Case operating temperature ran Minimum setup time, data to LE t4.5 V dc to t5.5 V dc 0.8 V dc _. Device type O1 - - - - - - Device type 02 - - - - - - - Devic

12、e type O1 - - - - - - - Device type O2 - - - - - - - Minimum hold time, data to LE Maximum preset recovery time, ow to high (trem): 17.0 ns 13.0 ns 17.0 ns 10.0 ns 6.0 ns 4.0 ns 9.0 ns 4.0 ns 9.9 ns 4.0 ns 2. APPLICABLE DOCUMENTS 2.1 Government s ecificationand standard, Unless otherwise specified,

13、the following, specification and standard, of the issue listed in that issue of the Department of Defense Index of Specifications and Standards Specified in the solicitation. form a Dart of this drawins to the extent specified herein. - SPECIFICATION MILITARY MIL-M-38510 - Microcircuits, General Spe

14、cification for. STANDARD MIL I TARY MIL-STD-883 - Test Methods and Procedures for Microelectronics. (Copies of the specification and standard required by manufacturers in connection with specific acquisition functions should be obtained from the contracting activity or as directed by the contracting

15、 activity, 1 references cited herein, the text of this drawing shall take precedence. 2.2 Order of precedence. 3. REQUIREMENTS 3.1 In the event of a conflict between the text of this drawing and the Item re uirements. The individual item requirements shall be in accordance with 1.2.1 of MIL-STO-883,

16、 “:ravisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices“ and as specified herein. SIZE 5962-88675 A STANDARDIZED MILITARY DRAWING pm 3 DEFENSE ELECTRONICS SUPPLY CENTER DAYK)N, OHIO 45444 REVISION LEVEL QU. 8 QOVEPNMENT PRIMING OFFNE: 18Brtbmitted to DESC-ECS prior to l

17、isting as an approved source of supply shall state that the ianufacturers product meets the requirements of MIL-STD-883 (see 3.1 herein) and the requirements ierein. 3.5 Certificate of compliance. A certificate of compliance shall be required from a manufacturer 3.6 Certificate of conformance. A cer

18、tificate of conformance as required in MIL-STD-883 (see 3.1 1erein)mbe provided with each lot of microcircuits delivered to this drawing. 3.7 Notification of chan e. Notification of change to DESC-ECS shall be required in accordance Ith MICISTa;BSS i see 3.1 nzrein). 3.8 Verification and review. DES

19、C, DESCs agent, and the acquirin activity retain the option to eview hall be made available onshore at the option of the reviewer. manufacturer- i ty and applicable required documentatvon. Offshore documentation 4. QUALITY ASSURANCE PROVISIONS spection. Sampling and inspection procedures shall be in

20、 accordance with to the extent specified in MIL-STD-883 (see 3.1 herein), 4.2 m. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be onducted on all devices prior to quality conformance inspection. The following additional criteria hall apply: a. Burn-in test, method 1015

21、of MIL-STD-883, (1) Test condition A, 8, C, or D using the circuit submitted with the certificate of (2) TA +125*C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, exce t interim electrical parameter tests prior to burn-in are optional at the discre

22、tion of tRe manufacturer. compliance (see 3.5 herein). SIZE 5962-88675 A STANDARDIZED MILITARY DRAWING I SHEET 4 t U. B. QOYERNME+T PWMHM OBCE pffl :SC FORM 193A ;EP a7 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DESC-DWG-b5 57 7777775 0033704 4

23、TABLE I. Electrical performance characteristics. I I I I I unii I I Limits I -55C TC +125OC I type I subgroupsT-T-7 I I VCC = 5.0 V-dc 10 % I I 1 Min I Max I I I unless otherwise specified I I III I I I I III I I 1 I I I I I vol tage I I I I I III I I I IIOH = -12 mA I All I 1,2,3 I 2.4 I I I I l I

24、i !I! I I I I I I I I Low level output IVOL IVCC = 4.5 Y, IIOL = 300 NA I All I 1,2,3 I I 0.2 I vol tage I I I I I III l i Ill IDevicelGroup A I Conditions I Test High level output IVOH IvCC = 4.5 v, IIOH = -300 PAI All I 1,2,3 I 4.3 I I V IVIN = 0.8 V or 2.0 V I /VIN = 0.8 V or 2.0 V I !IO = 32 mA

25、I All I 1,2,3 I I 0.5 1 II I I I I I I I I I Clamp diode voltage (VIK IVcc = 4.5 V, IIN -18 I All I 1 I I -1.21 High level input IIIH IVcc = 5.5 Y, VIN = 5.5 V I All I 1,2,3 I I 5 I NA I I III I I III I I I I current I I I I I I I I I I All I 1,2,3 I IIIL current I I I I I I I III I I I I Short circ

26、uit current 110s IVcc = 5.5 V L/ I I I I I Offstate output IIoz IVcc = 5.5 Y, Vo = 5.5 V or GND current I I I I I I I I I I Id Low level input IVcc = 5.5 Y, VIN = GND I All I 1,2,3 I -60 I I All I 1,2,3 I I 110 I MA I I I I I I -I Quiescent power IICCQ IVIN 5 0.2 V or VIN 5.3 V i All i 1,2,3 i i 1.5

27、 i mA supply current (CMOS I I I I III i nputs 1 I IVCC = 5.5 Y, fcp = fI = O MHz I I I I III I I - See footnotes at end of table. 5962-88675 REVISION LEVEL STANDARDIZED MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 *U. 5. QOVERNMENT PRIMING OFFICE: iW-548901 ESC FORM 193A SE

28、P a7 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-I TABLE I. Electrical performance characteristics - Continued. I I I I I Unlt I I Limits IDevicelGroup A I I I -55C TC +125“C I type I subgroupsm I I I Min I Max I I I VC = 3.0 V-dc * 10 X I I unle

29、ss otherwise specified I I III I I l I Il! I I I I I I I 2/ I I III I I Conditions Test I Symbol I Quiescent power supply IICCT Vcc E 5.5 V, VIN = 3.4 V I All I 1,2,3 I I 2.0 I mA current (TTL II - inputs 1 I I .+ l I I I Ill I Dynamic supply current IICCD IVcc = 5.5 V, Outputs open, TZ = GNDI All I

30、 ?/ I I 250 I PA, I I I I I I IMHi I I III 1 I50 percent duty cycle, I I III I IVIN L 5.3 V or VIN 5 0.2 V I I III l I I I III Total power supply IIcc IVcc = 5.5 V, Outputs open, One bit I I III 1 III I I I III 150 percent duty cycle, LE = 5.5 V I IVIN L 5.3 V or VIN 5 0.2 V I All I 1,2,3 I I 4.0 I

31、mA I I I I I I IVN = 3.4 V or VIN = GND I All I 1,2,3 I I 5.0 I I All I 7,8 I I I Functional tests I I I I Input capacitance (GIN ISee 4.3.1 IA11 I 4 I Il0 I pF I I Output capacitance COUT ISee 4.3.1 I lone bit toggling, I I I toggling fi = 10 MHz, UE I Gnd, Il I II I I III Ise 4*3*1d I I III I! I I

32、 III II current 4/ I I w l I I III 4 I 112 I I I I I I I I Propagation delay time itpLH, iCL = 50 pF *lo%, I I I ItpHL IRL = 5000 *5% Fro a ation delay time tpLH, ISee figure 4. LE 8, Yi Il i 01 i 9,10,i i i ii.oi ns I I III IT27 +-+ I o1 I 9,10,11 I I I I I l6.01 1021 I I 10.51 I I III I o1 I 9,10,

33、11 I I I 1021 I I 10.01 I I I I III I I 14*01 Pro agation delay time ItpLH I II all other inputs at Vcc or GND. - 3/ This parameter is not directly testable, but is derived for use in total power calculations. SIZE 5962-88675 A REVISION LEVEL SHEET 7 4/ ICC = ICCQ + (ICCT x OH x NT) + (I CD x (fcp/2

34、 + (fI x NI) - where DH = 50% duty cycle for TTL (inputs high Nr = Number of TTL inmts at Du II .- . . fi = input frequency in MHZ fcp = Clock frequency NI = Number of inputs at fI 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 30s of MIL - STD

35、5 including groups A, B, 6, and D Inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 5 and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroup 4 CI and COUT measurement) shall be mea

36、sured only initially and after process or design changes which may affect capacitance. d. Subgroups 7 and 8 tests shall verify the truth table on figure 3. - I Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-Device types Case out1 ines STANDARDIZED M

37、ILTTAW DRAWING DEFENSEWPPLYCENTER MW, DHW) 45444 Temi na1 number SIZE A 5962-88675 REv18K)IILRIEL SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 O1 and 02 I K and L I 3 I 1 Temi na1 symbol NC UET n2 DO D1 D2 D3 nc D4 D5 D7 D6 m GND NC LE m y6 y7 y5 y4 y3 y2 Y1 YO “c

38、c HC uE3 NC = No connect FIGURE 1. Terminal connections, . _.- Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-_ DESC-DWG-88b75 59 m 9777795 0013908 1 W SIZE A STANDARDIZED 1 5962-88675 n * P M n O O 6 w la (u w P Id -I DESC FORM 193A SEP 87 I /- f?

39、US. GOVERNMENTPRINTING OFFICE: 1987-549U86 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-c I I I I I I I I I I III I I I 1 I H I H IH IX I X I X I Z I HighZ I I I III I I I I 1 H I H IH IH I L I L I Z I HighZ I I III I I I I I I H I H IH IH I H I H

40、 I Z I HighI I I I III I I I I I I H I H I H I L I X I NC I Z I latched (high Z) 1 I 1II.I. I I I I, I l H 1 H I L I H I L I L I L I Transparent i I I III I I I I I 1 I H I H I L I H i H I H I H I Transparent 1.1 III I I I I I I I H I H I L I 1 I X I NC I NC I Latched I I I III I I I I ItlX I I I LE

41、 I Di I Qj I Yi I Function I I I III I I I I I i H i L i ix i x i H i H i Preset i 1 I III I I I I I I i L i H L ix i x i L i L i Clear i I I III I I I I 1.1 III I I I I I I III I I I I I I I L I L IL IX I x I H I H I Preset I T L I H I H 1 L I X I L I Z I Latched (high Z) I I H I L I H I L I X I H

42、I Z I Latched (high Z) I I I I I I H E High L LI Low X E Dont care I I High impedance NC = No change Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DESC-DWG-8675 57 m 7777775 0013710 T & r- - 3v 1.5V SAME PHASE INPUT TRANSITION 4., OV -jtPH& 3v OH -

43、 1.5 V OUTPUT VOL 1 1.5 V ov OPPOSITE PHASE INPUT TRANSITION 3v ov LOW- HIGH-LOW PULSE 1.5 V HIGH-LOW- HIGH tw-$ 3v 1.5 V PULSE ov FIGURE 4. Switching waveforms and test circuits. STANDARDIZED SIZE A 5962-88675 MILITARY DRAWING DEFENSE ELEClFiONICS SUPPLY CENTER REVISION LEVEL SHEET DAWN, OHIO 45444

44、 11 DESC FORM 193A US GOMRNMENTPR#ITINGOFFNE. 1987-540086 SEP a7 3v DATA INPUT 1.5 V ov 3v TIMING INPUT 1.5 V h -ov ra+ trem 3v 1.5 V OV DATA INPUT Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SWITCH POSkTIN STANDARDZU) I I Def Inlti ons : RL = Lo

45、ad resistor. L = Load capacbtance includes Sig and probe capacftance. RT = Termination should be equal to ZOUT of pulse generators, Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DESC-DWG-b75 54 = 7777775 0033732 3 STANDARDIZED MILITARY DRAWING DEFE

46、NSE ELECTRONICS SUPPLY CENIER DAMON. OHIO 45444 I ? I SIZE 5962-88675 A REVISION LEVEL SHEET 13 T DESC FORM 193A SEP 87 4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be as specified in table II herein. b. Steady-state life test conditions, method 1005 of MIL-STD-883. (1)

47、 Test condition A, E, C or D using the circuit submitted with the certificate of compliance (see 3.5 herein). (2) TA = +125OC, minimum. (3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. TABLE II. Electrical test requirements. I MIL-STD-883 test requirements I (per me

48、thod I I I 5005, table I) I I I 1 I Subgroups I i I (method 5004) I I I Final electrical test I 1*,2,3,7, I I 8,9,10,11 I i interim electrical parameters i - I I I (method 5004) I i Group A test requirements i 1,2,3,4,7,8 i I I I I (method 5005) I 9,10.11 I I Groups C and D end-point i 1,2,3 i I electrical parameters I I I (method 5005) I I * PDA applies to subgroup 1. 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with lIL-M-38hO. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use when milita