DLA SMD-5962-88680 REV A-2010 MICROCIRCUITS MEMORY DIGITAL CMOS 2K X 8 POWER DOWN UV EPROM MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Updated boilerplate as part of 5-year review. - glg 10-10-31 Charles Saffle THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED. REV SHEET REV SHEET REV STATUS REV A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREP

2、ARED BY James E. Jamison DLA LAND AND MARITIME STANDARD MICROCIRCUIT DRAWING CHECKED BY Charles Reusing COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUITS, MEMORY, DIGITAL, CMOS, 2K X 8 POWER DOWN UV EPROM,

3、MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 91-12-04 AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-88680 SHEET 1 OF 11 DSCC FORM 223 APR 97 5962-E348-10 .Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-S

4、TANDARD MICROCIRCUIT DRAWING SIZE A 5962-88680 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535

5、, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN shall be as shown in the following example: 5962-88680 | | Drawing Number 01 | | Device type (see 1.2.1) K | | Case outline (see 1.2.2) X | | Lead finish (see (1.2.3) 1.2.1 Device type(s). The device type(s) shall identify the circ

6、uit function as follows: Device type 01 02 03 04 Generic number 1/ (See 6.6) Circuit function 2K x 8 power down UV EPROM 2K x 8 power down UV EPROM 2K x 8 power down UV EPROM 2K x 8 power down UV EPROM Access time 50 ns 35 ns 30 ns 25 ns 1.2.2 Case outline(s). The case outline(s) are as designated i

7、n MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style 2/ K GDFP2-F24 or CDFP3-F24 24 flat package L GDIP3-T24 or CDIP4-T24 24 dual-in-line package 3 CQCC1-N28 28 square chip carrier package 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, ap

8、pendix A. 1.3 Absolute maximum ratings. Supply voltage range (VCC) - - - - - - - - - - - - - - DC voltage applied to outputs in high Z state - DC Input voltage range - - - - - - - - - - - - - - - - DC program voltage- - - - - - - - - - - - - - - - - - - Maximum power dissipation (PD) 3/ - - - - - -

9、- Lead temperature (soldering, 10 seconds)- - - Thermal resistance, junction-to-case (JC): - - Junction temperature (TJ)- - - - - - - - - - - - - - - Storage temperature range- - - - - - - - - - - - - - Temperature under bias range - - - - - - - - - - - Endurance - - - - - - - - - - - - - - - - - -

10、- - - - - - - Data retention- - - - - - - - - - - - - - - - - - - - - - - -0.5 V dc to +7.0 V dc -0.5 V dc to +7.0 V dc -3.0 V dc to +7.0 V dc 13.0 V dc 1.0 W +260C See MIL-STD-1835 +175C -65C to +150C -55C to +125C 50 cycles/byte, minimum 10 years, minimum 1.4 Recommended operating conditions. Supp

11、ly voltage range (VCC) - - - - - - - - - - - - - - Ground voltage (GND) - - - - - - - - - - - - - - - - - Input high voltage (VIH)- - - - - - - - - - - - - - - - - Input low voltage (VIL) - - - - - - - - - - - - - - - - - Case operating temperature range (TC) - - - - - +4.5 V dc to +5.5 V dc 0 V dc

12、2.0 V dc minimum 0.8 V dc maximum -55C to +125C _ 1/ Generic numbers are listed on the Standard Microcircuit Drawing Source Approval Bulletin at the end of this document and will also be listed in the MIL-HDBK-103. 2/ Lid shall be transparent to permit ultraviolet light erasure. 3/ Must withstand th

13、e added PDdue to short circuit test (e.g., IOS) Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88680 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 2. APPLICAB

14、LE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT

15、 OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-10

16、3 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Or

17、der of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1

18、Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manu

19、facturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may

20、make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow opt

21、ion is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal c

22、onnections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.3.1 Unprogrammed or erased devices. The truth table for unprogrammed devices for contracts involving no altered item drawing shall be as specified on figure 2. When required in scr

23、eening (see 4.2) and groups A, C, or D (see 4.3), the devices shall be programmed by the manufacturer prior to test with a checkerboard pattern or equivalent (a minimum of 50 percent of the total number of bits programmed) or to any altered item drawing pattern which includes at least 25 percent of

24、the total number of bits programmed. 3.2.3.2 Programmed devices. The truth table for programmed devices shall be as specified by an attached altered item drawing. 3.3 Electrical performance characteristics. Unless otherwise specified, the electrical performance characteristics are as specified in ta

25、ble I and apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-3

26、8535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the dev

27、ice. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88680 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test

28、Symbol Conditions -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified Group A subgroups Device types Limits Unit Min Max Output high voltage VOH VCC=4.5 V, IOH=-4.0 mA VIN=VIH, VIL 1, 2, 3 All 2.4 V Output low voltage VOL VCC=4.5 V, IOL=16.0 mA VIN=VIH, VIL 1, 2, 3 All 0.4 V Input high voltage

29、1/ VIH 1, 2, 3 All 2.0 V Input low voltage 1/ VIL 1, 2, 3 All 0.8 V Input leakage current IIX VIN=VCCto GND 1, 2, 3 All -10 10 A Output leakage current IOZ VOUT=VCCto GND 1, 2, 3 All -10 10 A Output short circuit current 2/ 3/ IOS VCC=5.5 V, 4.5 V VOUT=0.0 V 1, 2, 3 All -20 -90 mA Power supply curre

30、nt ICC1 VCC=5.5 V, 1CS =VIL, CS2=CS3=VIH. IOUT=0 mA, f=fMAX4/ Addresses cycling between 0 V and 3 V 1, 2, 3 01, 02 03 90 mA 04 120 Standby supply current ICC2VCC=5.5 V, 1CS =VIH, all other inputs VILor VIH. IOUT=0 mA, f=0 MHz 1, 2, 3 All 40 mA Input capacitance 3/ CIN VCC=5.0 V, VIN=0 V TA=25C, f=1

31、MHz (See 4.3.1c) 4 All 10 pF Output capacitance 3/ COUT VCC=5.0 V, VOUT=0 V TA=25C, f=1 MHz (See 4.3.1c) 4 All 10 pF Functional tests See 4.3.1d 7, 8 All Address to output valid tAA See figures 3 and 4 5/ 9, 10, 11 01 50 ns 02 35 03 30 04 25 Chip select inactive to high Z excluding 1CS only 3/ 6/ tH

32、ZCS1 9, 10, 11 01, 02 25 ns 03, 04 20 Chip select active to output valid tACS1 9, 10, 11 01, 02 25 ns 03, 04 20 Chip select inactive to high Z ( 1CS only) 3/ 6/ tHZCS2 9, 10, 11 01 45 ns 02 35 03 32 04 27 Chip select active to output valid ( 1CS only) tACS2 9, 10, 11 01 45 ns 02 35 03 32 04 27 Chip

33、select active to power up ( 1CS only) 3/ tPU 9, 10, 11 All 0 ns Chip select inactive to power down ( 1CS only) 3/ tPD9, 10, 11 01 45 ns 02 35 03 32 04 27 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIR

34、CUIT DRAWING SIZE A 5962-88680 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. 1/ These are absolute values with respect to device ground and all overshoots and undershoots due to system or te

35、ster noise are included. 2/ For test purposes, not more than one output at a time should be shorted. Short circuit test duration should not exceed 30 seconds. 3/ Tested initially and after any design or process changes that affect that parameter, and therefore shall be guaranteed to the limits speci

36、fied in table I. 4/ At f = fMAX, address and data inputs are cycling at the maximum frequency of 1/tAVAV. 5/ AC tests are performed with input rise and fall times of 5 ns or less, timing reference levels of 1.5 V, input pulse levels of 0 to 3.0 V, and the output load on figure 3 (circuit A). 6/ Tran

37、sition is measured at steady-state high level -500 mV or steady-state low level +500 mV on the output from the 1.5 V level on the input, CL= 5 pF (including scope and jig). See figure 3 (circuit B). 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN device

38、s built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used 3.6 Certificate of compliance. A certificate of compliance shall be required from a

39、manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-385

40、35, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime -V

41、A shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritime s agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be ma

42、de available onshore at the option of the reviewer. 3.10 Processing EPROMs. All testing requirements and quality assurance provisions herein shall be satisfied by the manufacturer prior to delivery. 3.10.1 Erasure of EPROMs. When specified, devices shall be erased in accordance with the procedures a

43、nd characteristics specified in 4.4. 3.10.2 Programmability of EPROMs. When specified, devices shall be programmed to the specified pattern using the procedures and characteristics specified in 4.5. 3.10.3 Verification of erasure or programmed EPROMs. When specified, devices shall be verified as eit

44、her programmed to the specified pattern or erased. As a minimum, verification shall consist of performing a functional test (subgroup 7) to verify that all bits are in the proper state. Any bit that does not verify to be in the proper state shall constitute a device failure, and shall be removed fro

45、m the lot. 3.11 Endurance. A reprogrammability test shall be completed as part of the vendors reliability monitors. This reprogrammability test shall be done for initial characterization and after any design or process changes which may affect the reprogrammability of the device. The methods and pro

46、cedures may be vendor specific, but shall guarantee the number of program/erase endurance cycles listed in section 1.3 herein over the full military temperature range. The vendors procedure shall be kept under document control and shall be made available upon request of the acquiring or preparing ac

47、tivity, along with test data. 3.12 Data retention. A data retention stress test shall be completed as part of the vendors reliability monitors. This test shall be done for initial characterization and after any design or process change, which may affect data retention. The methods and procedures may

48、 be vendor specific, but shall guarantee the number of years listed in section 1.3 herein over the full military temperature range. The vendors procedure shall be kept under document control and shall be made available upon request of the acquiring or preparing activity, along with test data. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88680 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 Device types All Case outlines K,