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本文(DLA SMD-5962-88699 REV A-2008 MICROCIRCUIT LINEAR 16-CHANNEL DIFFERENTIAL 8- CHANNEL CMOS MULTIPLEXER.pdf)为本站会员(amazingpat195)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-88699 REV A-2008 MICROCIRCUIT LINEAR 16-CHANNEL DIFFERENTIAL 8- CHANNEL CMOS MULTIPLEXER.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Redraw. Update drawing to current requirements. - drw 08-10-24 Robert M. Heber THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED. REV SHET REV SHET REV STATUS REV A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 PM

2、IC N/A PREPARED BY Rick Officer CHECKED BY Ray Monnin DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil APPROVED BY Michael A. Frye STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPRO

3、VAL DATE 88-12-20 MICROCIRCUIT, LINEAR, 16-CHANNEL/ DIFFERENTIAL 8- CHANNEL CMOS MULTIPLEXER AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-88699 SHEET 1 OF 13 DSCC FORM 2233 APR 97 5962-E479-08 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-

4、STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88699 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL

5、-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-88699 01 X A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type. The device type identifies the circuit function as follows: D

6、evice type Generic number Circuit function 01 HI-516 16-channel/differential 8-channel CMOS analog multiplexer 1.2.2 Case outlines. The case outlines are as designated in MIL-STD-1835 as follows: Outline letter Descriptive designator Terminals Package style X GDIP1-T28 or CDIP2-T28 28 Dual-in-line 3

7、 CQCC1-N28 28 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Voltage between +VCCand -VCC33 V dc Voltage between +VCCand ground 16.5 V dc Voltage between -VCCand ground . 16.5 V dc Analog input voltage: +VS+

8、VCC+ 2.0 V dc -VS-VCC- 2.0 V dc Digital input voltage, TTL (VDD/LLS = GND or open): +VA+6.0 V dc -VA-6.0 V dc +A3/SDS. +VCC+ 2.0 V dc -A3/SDS -VCC- 2.0 V dc Digital input voltage, CMOS (VDD/LLS = +15 V): +VA+VCC+ 2.0 V dc -VA-2.0 V dc Storage temperature range -65C to +150C Maximum power dissipation

9、 (PD): Case X . 2.0 W 1/ Case 3 1.23 W 2/ Lead temperature (soldering, 10 seconds) +275C Thermal resistance, junction-to-case (JC). See MIL-STD-1835 Thermal resistance, junction-to-ambient (JA): Case X . 50C/W Case 3 81C/W Junction temperature (TJ) +175C _ 1/ Derate linearly above TA= +75C at 20.0 m

10、W/C. 2/ Derate linearly above TA= +75C at 12.3 mW/C.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88699 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 9

11、7 1.4 Recommended operating conditions. Supply voltage (VCC) 15 V dc Analog input voltage (VS). VCCInput logic low voltage range (VAL). 0 V dc to 0.8 V dc Input logic high voltage range (VAH). 2.4 V dc to +VCCAmbient operating temperature range (TA) -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Governme

12、nt specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION

13、 MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Micr

14、ocircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the

15、event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. Provided by IHSNot for ResaleNo reproduction o

16、r networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88699 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance w

17、ith MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 ma

18、y be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not

19、 affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design,

20、construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth tables. The truth

21、tables shall be as specified on figure 2. 3.2.4 Functional diagram. The functional diagram shall be as specified on figure 3. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the

22、 full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The

23、 part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certificat

24、ion/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used

25、. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm

26、that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notifi

27、cation of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentat

28、ion shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88699 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC

29、FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TA +125C Group A subgroupsDevice type Limits Unit unless otherwise specified Min Max Input leakage current IIHMeasure inputs sequentially, All unused inputs = GND 1, 2, 3 All -1.0 1.0 A IILMeasure inputs

30、 sequentially, All unused inputs = +5.0 V 1, 2, 3 -25 25 Leakage current into the source terminal of an “OFF” switch +IS(OFF)VS= +10 V, VD= -10 V, VEN= 0.8 V, All unused inputs = -10 V 1, 2, 3 All -50 +50 nA -IS(OFF)VS= -10 V, VD= +10 V, VEN= 0.8 V, All unused inputs = +10 V 1, 2, 3 -50 +50 Leakage

31、current into the drain terminal of an “OFF” switch +ID(OFF)VS= -10 V, VD= +10 V, VEN= 0.8 V, All unused inputs = -10 V 1, 2, 3 All -100 +100 nA -ID(OFF)VS= +10 V, VD= -10 V, VEN= 0.8 V, All unused inputs = +10 V 1, 2, 3 -100 +100 Leakage current from an “ON” driver into the switch (drain) +ID(ON)VS=

32、 VD= +10 V, All unused inputs = -10 V 1, 2, 3 All -100 +100 nA -ID(ON)VS= VD= -10 V, All unused inputs = +10 V 1, 2, 3 -100 +100 Positive supply current +ICCVS= 0 V, VD= open, VEN= 2.4 V, sequence all address combinations, record highest +ICC 1, 2, 3 All +25 mA Negative supply current -ICCVS= 0 V, V

33、D= open, VEN= 2.4 V, sequence all address combinations, record highest -ICC 1, 2, 3 All -25 mA Standby positive supply current +ISBYVA= 0.8 V, VEN= 0.8 V, VS= 0 V, VD= open 1, 2, 3 All +25 mA Standby Negative supply current -ISBY1, 2, 3 -25 mA Switch “ON” resistance +RDS1VS= +10 V, ID= -100 A 1 All

34、750 2, 3 1000 -RDS1VS= -10 V, ID= +100 A 1 750 2, 3 1000 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88699 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION

35、LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - continued. Test Symbol Conditions 1/ -55C TA +125C Group A subgroupsDevice type Limits Unit unless otherwise specified Min Max Logic level voltage VAL(TTL) VDD/LLS = GND 1, 2, 3 All 0.8 V VAH(TTL) 2.4 VAL(CMOS) V

36、DD/LLS = +15 V 1, 2, 3 All 4.5 V VAH(CMOS) 10.5 Address input capacitance CA+VCC= -VCC= 0 V, f = 1.0 MHz, TA= +25C, See 4.3.1c 4 All 10 pF Output switch capacitance COS4 All 25 pF Input switch capacitance CIS4 All 10 pF Charge transfer error 2/ VCTEVS= GND, VEN= 0 to 5.0 V, CL= 100 pF, f = 500 kHz,

37、TA= +25C 4 All 20 mV Off channel isolation 2/ VISOVEN= 0.8 V, RL= 1.0 k, CL= 40 pF, VS= 3.0 V rms, f = 500 kHz, TA= +25C 4 All -55 dB Break-before-make time delay tdRL= 800, CL= 12.5 pF 9 All 10 ns See figure 4 10 2.0 11 2/ 2.0 Propagation delay time, enable to I/O tON(EN)9 All 175 ns 10, 11 225 tOF

38、F(EN)9 175 ns 10, 11 225 tARL= 10 M, CL= 12.5 pF 9 All 175 ns Propagation delay time, address inputs to I/O channel See figure 4 10, 11 225 Functional test See 4.3.1d 7, 8 All 1/ +VCC= +15 V, -VCC= -15V, VEN= 2.4 V, VDD/LLS = GND, VAH= 2.4 V and VAL= 0.8 V, unless otherwise specified. 2/ Guaranteed,

39、 but not tested to the limits specified in table I.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88699 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97

40、 Device type 01 Case outlines X and 3 Terminal number Terminal symbol 1 +VCC 2 OUT B 3 No connection 4 IN 16/8B 5 IN 15/7B 6 IN 14/6B 7 IN 13/5B 8 IN 12/4B 9 IN 11/3B 10 IN 10/2B 11 IN 9/1B 12 GND 13 VDD/LLS 14 A3/SDS 15 A216 A117 A018 Enable 19 IN 1/1A 20 IN 2/2A 21 IN 3/3A 22 IN 4/4A 23 IN 5/5A 24

41、 IN 6/6A 25 IN 7/7A 26 IN 8/8A 27 -VCC28 OUT A FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88699 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A S

42、HEET 8 DSCC FORM 2234 APR 97 16-channel multiplexer operation. 1/ 2/ Use A3as digital address input On channel to Enable A3A2A1A0OUT A OUT B L X X X X None None H L L L L 1A None H L L L H 2A None H L L H L 3A None H L L H H 4A None H L H L L 5A None H L H L H 6A None H L H H L 7A None H L H H H 8A

43、None H H L L L None 1B H H L L H None 2B H H L H L None 3B H H L H H None 4B H H H L L None 5B H H H L H None 6B H H H H L None 7B H H H H H None 8B See footnotes at end of table. FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,

44、-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88699 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 9 DSCC FORM 2234 APR 97 Differential 8-channel multiplexer operation. 2/ 3/ A3connected to -VCCOn channel to Enable A2A1A0OUT A OUT B L X X X None None H L L L 1A 1B H L L

45、 H 2A 2B H L H L 3A 3B H L H H 4A 4B H H L L 5A 5B H H L H 6A 6B H H H L 7A 7B H H H H 8A 8B 1/ For 16-channel operation, connect OUT A to OUT B. 2/ H = High logic level L = Low logic level X = Dont care 3/ For differential 8-channel operation, use the A3address pin to select the differential mode w

46、here A3= -VCCand OUT A is not connected to OUT B. FIGURE 2. Truth table - continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88699 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEV

47、EL A SHEET 10 DSCC FORM 2234 APR 97 A3decode A3Q Q H H L L L H -VCCL L NOTES: 1. LLS = logic level select. The circuit is TTL compatible when VDD/LLS = GND or open, and CMOS compatible when VDD/LLS = +15 V. 2. SDS = single ended/differential select. Multiplexer is in differential mode when A3/SDS =

48、-VCC. FIGURE 3. Functional diagram.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88699 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 11 DSCC FORM 2234 APR 97 FIGURE 4. Switching waveforms. Provided b

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