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本文(DLA SMD-5962-88705 REV B-2010 MICROCIRCUIT DIGITAL ADVANCED CMOS 10-BIT D-TYPE FLIP-FLOP WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf)为本站会员(visitstep340)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-88705 REV B-2010 MICROCIRCUIT DIGITAL ADVANCED CMOS 10-BIT D-TYPE FLIP-FLOP WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update boilerplate to MIL-PRF-38535 requirements. Editorial changes throughout. - jak 03-06-10 Thomas M. Hess B Update test condition for High level output voltage (VOH) and Low level output voltage (VOL) in table I. Update boilerplate paragraphs

2、 to current MIL-PRF-38535 requirements. - MAA 10-04-12 Thomas M. Hess REV SHEET REV SHEET REV STATUS REV B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Christopher A. Raush DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDA

3、RD MICROCIRCUIT DRAWING CHECKED BY W. J. Johnson THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, ADVANCED CMOS, 10-BIT D-TYPE FLIP-FLOP WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICO

4、N DRAWING APPROVAL DATE 89-02-09 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-88705 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E266-10 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS

5、 COLUMBUS, OHIO 43218-3990 SIZE A 5962-88705 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN)

6、. The complete PIN is as shown in the following example: 5962-88705 01 K A Drawing number Device type Case outline Lead finish (see 1.2.1) (see 1.2.2) (see 1.2.3) 1.2.1 Device types. The device types identify the circuit function as follows: Device type Generic number Circuit function 01 54ACT821 10

7、-bit D-type flip-flop with three state outputs, TTL compatible inputs 1.2.2 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style K GDFP2-F24 or CDFP3-F24 24 Flat pack L GDIP3-T24 or CDIP4-T24 24 Dual-in-line3

8、 CQCC1-N28 28 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ 2/ Supply voltage range (VCC) -0.5 V dc to +6.0 V dc maximum DC input voltage range (VIN) -0.5 V dc to VCC+ 0.5 V dc DC output voltage range (V

9、OUT) . -0.5 V dc to VCC+ 0.5 V dc DC clamp current (IIK) (IOK) 20 mA DC output current (IOUT) . 50 mA DC VCCor GND current (ICCor IGND) 100 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD) 500 mW Lead temperature (soldering, 10 seconds) +300C Thermal resistance, jun

10、ction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 3/ 1.4 Recommended operating conditions. 1/ Supply voltage range (VCC) +4.5 V dc minimum to 5.5 V dc maximum Input voltage range (VIN) 0.0 V dc to VCCOutput voltage range (VOUT) 0.0 V dc to VCCCase operating temperature range (TC)

11、 . -55C to +125C Input rise or fall rate (t/V): VCC= 4.5 V or VCC= 5.5 V . 0 to 8 ns/V 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise specified, all v

12、oltages are referenced to ground. 3/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-ST

13、ANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-88705 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of t

14、his drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL

15、-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online a

16、t https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing tak

17、es precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices

18、and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacture

19、rs approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modification

20、s shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. This Drawing has been modified to allow the manufacturer to use alternate die/fabrication requirements paragraphs A.3.2.2 of MI

21、L-PRF-383535 or other alternative approved by the qualifying activity. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance wit

22、h 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The swit

23、ching waveforms and test circuit shall be as specified on figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-88705 REVISION LEVEL B SHEET 4 DSCC

24、 FORM 2234 APR 97 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements s

25、hall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked.

26、 For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to M

27、IL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to

28、be listed as an approved source of supply in MIL-HDBK-103 and QML-38535 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requir

29、ements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects

30、 this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleN

31、o reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-88705 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test and MIL-STD-883 test metho

32、d 1/ Symbol Test conditions -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified Group A subgroups Limits 2/ Unit Min Max High-level output voltage 3006 VOH3/ VIH= 2.0 V or VIL= 0.8 V IOH= -50 A VCC= 4.5 V 1, 2, 3 4.4 V VCC= 5.5 V 5.4 VIH= 2.0 V or VIL= 0.8 V IOH= -24 mA VCC= 4.5 V 3.7 VCC= 5.5

33、V 4.7 VIH= 2.0 V or VIL= 0.8 V IOH= -50 mA VCC= 5.5 V 3.85 Low-level output voltage 3007 VOL3/ VIH= 2.0 V or VIL= 0.8 V IOL= +50 A VCC= 4.5 V 1, 2, 3 0.1 V VCC= 5.5 V 0.1 VIH= 2.0 V or VIL= 0.8 V IOL= +24 mA VCC= 4.5 V 0.5 VCC= 5.5 V 0.5 VIH= 2.0 V or VIL= 0.8 V IOL= +50 mA VCC= 5.5 V 1.65 High-leve

34、l input voltage VIH4/ VCC= 4.5 V 1, 2, 3 2.0 V VCC= 5.5 V 2.0 Low-level input voltage VIL4/ VCC= 4.5 V 1, 2, 3 0.8 V VCC= 5.5 V 0.8 Input leakage current low 3009 IILVIN= 0.0 V VCC= 5.5 V 1, 2, 3 -1.0 A Input leakage current high 3010 IIHVIN= 5.5 V VCC= 5.5 V 1, 2, 3 1.0 Quiescent supply current del

35、ta, TTL input levels 3005 ICC 5/ VCC= 5.5 V For input under test, VIN= VCC- 2.1 V For all other inputs, VIN= VCCor GND 1, 2, 3 1.6 mA Quiescent supply current 3005 ICCHVIN = VCC or GND VCC= 5.5 V IOUT= 0.0 mA 1, 2, 3 160 A ICCL160 ICCZ160 Three-state output leakage current high 3021 IOZH OEnullnulln

36、ullnull= 2.0 V or 0.0 V For all other inputs, VIN= VCCor GND VCC= 5.5 V VOUT= 5.5 V or 0.0 V 1, 2, 3 10.0 A Three-state output leakage current low 3020 IOZL -10.0 Input capacitance 3012 CINSee 4.3.1c 4 8.0 pF Power dissipation capacitance CPD6/ See 4.3.1c 4 95.0 pF Functional tests 3014 Tested at VC

37、C= 4.5 V and repeated at VCC= 5.5 V, see 4.3.1d 7, 8 L H See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-88705 REVISION

38、LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test and MIL-STD-883 test method 1/ Symbol Test conditions -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified Group A subgroups Limits 2/ Unit Min Max Propagation delay time, CP to On 3003 tPHL, tP

39、LH7/ VCC= 4.5 V CL= 50 pF RL= 500 See figure 4 9, 10, 11 1.0 11.5 ns Propagation delay time, output enable, OEnullnullnullnullto On 3003 tPZH, tPZL7/ 9, 10, 11 1.0 13.0 Propagation delay time, output disable, OE to On 3003 tPHZ, tPLZ7/ 9, 10, 11 1.0 13.5 Maximum frequency fMAX 9, 10, 11 85 MHz Pulse

40、 width, CP tw9, 10, 11 6.0 ns Minimum set-up time, Dn to CP ts9 3.510, 11 4.0 Minimum hold time, Dn to CP th2.510, 11 3.0 1/ For tests not listed in the referenced MIL-STD-883 (e.g.ICC), utilize the general test procedure under the conditions listed herein. All inputs and outputs shall be tested, as

41、 applicable, to the tests in table I herein. 2/ For negative and positive voltage and current values, the sign designates the potential difference in reference to GND and the direction of current flow, respectively; and the absolute value of the magnitude, not the sign, is relative to the minimum an

42、d maximum limits, as applicable, listed herein. 3/ VOHand VOLshall be tested at VCC= 4.5 V. VOHand VOLare guaranteed, if not tested, for VCC= 5.5 V. Limits shown apply to operation at VCC= 5.0 V 0.5 V. Transmission driving tests are performed at VCC= 5.5 V with a 2 ms duration maximum. 4/ VIHand VIL

43、tests are not required, and shall be applied as forcing functions for VOHand VOLtests. 5/ This test may be performed either one input at a time (preferred method) or with all input pins simultaneously at VIN= VCC- 2.1 V (alternate method). Classes Q and V shall use the preferred method. When the tes

44、t is performed using the alternate test method, the maximum limits are equal to the number of inputs at a high TTL input level times 1.6 mA; and the preferred method and limits are guaranteed. 6/ Power dissipation capacitance (CPD) determines the no load dynamic power consumption, PD= (CPD+ CL) (VCC

45、x VCC)f + (ICCx VCC) + (n x d x ICCx VCC). The dynamic current consumption, IS= (CPD+ CL) VCC f + ICC+ n x d x ICC. For both PDand IS, n is the number of device inputs at TTL levels, f is the frequency of the input signal, and d is the duty cycle of the input signal. 7/ AC limits at VCC= 5.5 V are e

46、qual to limits at VCC= 4.5 V and guaranteed by testing at VCC= 4.5 V. The minimum ac limits are guaranteed for VCC= 5.5 V by guard banding the VCC= 4.5 V limits to 1.5 ns minimum. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT

47、DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-88705 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 Device type 01 Case outlines K and L 3 Terminal number Terminal symbol 1 OEnullnullnullnullNC 2 D0 OEnullnullnullnull3 D1 D04 D2 D1 5 D3 D26 D4 D3 7 D5 D48 D6 NC 9 D7 D51

48、0 D8 D6 11 D9 D712 GND D8 13 CP D914 O9 GND 15 O8 NC 16 O7 CP 17 O6 O9 18 O5 O8 19 O4 O7 20 O3 O6 21 O2 O5 22 O1 NC 23 O0 O4 24 VCCO3 25 - - - O2 26 - - - O1 27 - - - O0 28 - - - VCCNC = No internal connection FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-88705 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 Inputs Outp

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