DLA SMD-5962-88741 REV C-2008 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED LOW POWER SCHOTTKY TTL 8-BIT ADDRESSABLE LATCHES MONOLITHIC SILICON《单片硅八位可寻址锁存器改进的低功率肖特基TTL双极数字微电路》.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R241-92. 92-07-10 Michael A. Frye B Update drawing to reflect current requirements. New boilerplate. -ljs 00-09-21 Ray Monnin C Update drawing to current requirements. Editorial changes throughout. - gap 08-04-

2、01 Robert M. Heber The original first sheet of this drawing has been replaced. REV SHET REV SHET REV STATUS REV C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY Larry T. Gauder DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Ray Monnin COLUMBUS, O

3、HIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED LOW POWER SCHOTTKY, TTL, 8-BIT AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 88-11-30 ADDRESSABLE LATCHES, MONOLITHIC SILI

4、CON AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-88741 SHEET 1 OF 10 DSCC FORM 2233 APR 97 5962-E618-07 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88741 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS,

5、OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as show

6、n in the following example: 5962-88741 01 E X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ALS259 8-bit addressable latches 1.2.

7、2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line F GDFP2-F16 or CDFP3-F16 16 Flat-pack 2 CQCC1-N20 20 Square chip carrier 1.2.3 Lead finish. The lead finish

8、is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range . -0.5 V dc minimum to +7.0 V dc maximum Input voltage range -1.5 V dc at -18 mA to +7.0 V dc Storage temperature range -65C to +150C Lead temperature (soldering, 10 seconds) +300C Junction temperature (

9、TJ) +175C Maximum power dissipation (PD) 1/ 121 mW Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc minimum to +5.5 V dc maximum Minimum high level input voltage (VIH) . 2.0 V dc Maximum low level input voltage (V

10、IL) 0.7 V dc Maximum high level output current (IOH) -0.4 mA Minimum low level output current (IOL) . 4 mA Pulse duration (tW): G low . 20 ns CLR low . 10 ns _ 1/ Maximum power dissipation is defined as VCCx ICC, and the device must withstand the added PDdue to short circuit test, e.g; IO. Provided

11、by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88741 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 Setup time (tSU): Data before G + . 20 ns Address before G

12、+ . 20 ns Hold time (th): Data after G + 0 ns Address after G + 0 ns Case operating temperature range (TC) -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent spe

13、cified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Stand

14、ard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/

15、quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing tak

16、es precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices

17、and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacture

18、rs approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modification

19、s shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in M

20、IL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Test circuit and s

21、witching waveforms The test circuit and switching waveforms shall be as specified on figure 3. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88741 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 RE

22、VISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The ele

23、ctrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufactur

24、ers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devic

25、es built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from

26、a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A a

27、nd the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change

28、 that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 4. VERIFICATION 4

29、.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following addition

30、al criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall spec

31、ify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests pr

32、ior to burn-in are optional at the discretion of the manufacturer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88741 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC

33、FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TC+125C Group A subgroups Limits Unit unless otherwise specified Min Max High level output voltage VOHVCC= 4.5 V, VIH= 2.0 V, IOH= -0.4 mA, VIL= 0.7 V 2/ 1, 2, 3 2.5 V Low level output voltage VOLVCC= 4.

34、5 V, VIH= 2.0 V IOL= 4 mA, VIL= 0.7 V 2/ 1, 2, 3 0.4 V Input clamp voltage VICVCC= 4.5 V, IIN= -18 mA 1, 2, 3 -1.5 V Low level input current IIL VCC= 5.5 V, VIN= 0.4 V All unused inputs 4.5 V 1, 2, 3 -0.1 mA High level input current IIH1 VCC= 5.5 V, VIN= 2.7 V All unused inputs = 0.0 V 1, 2, 3 20 A

35、IIH2 VCC= 5.5 V, VIN= 7.0 V All unused inputs = 0.0 V 1, 2, 3 0.1 mA Output current IOVCC= 5.5 V, VOUT= 2.25 V 3/ 1, 2, 3 -20 -112 mA Supply current ICCVCC= 5.5 V 1, 2, 3 22 mA Functional tests See 4.3.1c 4/ 7, 8 9, 10, 11 ns Propagation delay time from clear to any Q tPHL1 2 15 tPLH2 9, 10, 11 4 22

36、 ns Propagation delay time from data to any Q tPHL2 2 15 tPLH3 9, 10, 11 4 26 ns Propagation delay time from address to any Q tPHL3 2 15 tPLH4 9, 10, 11 4 22 ns Propagation delay time from enable to any Q tPHL4 VCC= 4.5 to 5.5 V, CL= 50 pF, RL= 500 , See figure 3 5/ 2 16 1/ Unused inputs that do not

37、 directly control the pin under test must be 2.5 V dc or 0.4 V. No unused inputs shall exceed 5.5 V or go less than 0.0 V. No inputs shall be floated. 2/ All outputs must be tested. In the case where only one input at VILmaximum or VIHminimum produces the proper output state, the test must be perfor

38、med with each input being selected as the VILmaximum or VIHminimum input. 3/ The output conditions have been chosen to produce a current that closely approximates one-half of the true short circuit output current, IOS. Not more than one output will be tested at one time and the duration of the test

39、condition shall not exceed one second. 4/ Functional tests shall be conducted at input test conditions of GND VIL VOLand VOH VIH VCC. 5/ Propagation delay limits are based on single output switching. Unused inputs = 3.5 V or 0.3 V. Provided by IHSNot for ResaleNo reproduction or networking permitted

40、 without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88741 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 Case outlines E and F 2 Terminal number Terminal symbol 1 S0 NC 2 S1 S0 3 S2 S1 4 Q0 S2 5 Q1 Q0 6 Q2 NC 7 Q3 Q1 8 GND

41、Q2 9 Q4 Q3 10 Q5 GND 11 Q6 NC 12 Q7 Q4 13 D Q5 14 GQ6 15 CLRQ7 16 VCC NC 17 D 18 G19 CLR20 VCC NC = No connection FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88741 DEFENSE

42、SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 Select inputs Latch S2 S1 S0 addressed L L L 0 L L H 1 L H L 2 L H H 3 H L L 4 H L H 5 H H L 6 H H H 7 Inputs Output of Each addressed other Function CLRGlatch output H L D Qi0 Addressable latch H H Qi0 Q

43、i0 Memory L L D L 8-bit demultiplexer L H L L Clear D = the level at the data input Qi0= the level of QI(I = Q, 1, , 7, as appropriate) before the indicated steady state input conditions were established. H = high level voltage L = low level voltageFIGURE 2. Truth table. Provided by IHSNot for Resal

44、eNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88741 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97 NOTES: 1. CLincludes probe and jig capacitance. 2. All input pulses have the f

45、ollowing characteristics: PRR 10 MHz, duty cycle = 50%, tr= tf= 3 ns 1 ns. 3. The outputs are measured one at a time with one transition per measurement. FIGURE 3. Test circuit and switching waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-

46、STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88741 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 9 DSCC FORM 2234 APR 97 TABLE II. Electrical test requirements. MIL-STD-883 test requirements Subgroups (in accordance with MIL-STD-883, method 5005, table I) Interim elect

47、rical parameters (method 5004) - - - Final electrical test parameters (method 5004) 1*, 2, 3, 7, 8, 9, 10, 11 Group A test requirements (method 5005) 1, 2, 3, 7, 8, 9, 10, 11 Groups C and D end-point electrical parameters (method 5005) 1, 2, 3 * PDA applies to subgroup 1. 4.3 Quality conformance ins

48、pection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 4, 5, and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroups 7 and 8 shall include verification of the truth table. 4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be as specifie