DLA SMD-5962-88753 REV C-2011 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED SCHOTTKY TTL OCTAL BUS TRANSCEIVERS AND REGISTERS MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Technical change in table 1. Update boilerplate throughout. 92-02-19 Monica L. Poelking B Update to reflect latest changes in format and requirements. Editorial changes throughout. les 05-06-27 Raymond Monnin C Update drawing as part of 5 year re

2、view. jt 11-11-08 C. SAFFLE THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. REV SHEET REV SHEET REV STATUS REV C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Larry T. Gauder DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.

3、dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY Raymond Monnin APPROVED BY Mike Frye MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED SCHOTTKY, TTL, OCTAL BUS TRANSCEIVERS AND REGISTERS, MONOLITHIC SILICON DRAWIN

4、G APPROVAL DATE 88-10-03 AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-88753 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E036-12Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88753 DLA LAND AND MARITIME

5、 COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN

6、 is as shown in the following example: 5962-88753 01 L X Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type. The device type identify the circuit function as follows: Device type Generic number Circuit function 01 54AS651 Octal bus transceivers

7、and registers (inverting), with three-state output 1.2.2 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style K GDFP2-F24 or CDFP3-F24 24 flat L GDIP3-T24 or CDIP4-T24 24 dual-in-line 3 CQCC1-N28 28 leadless

8、chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range . -0.5 V dc minimum to +7.0 V dc maximum Input voltage range: Control inputs . -1.2 V dc at -18 mA to +7.0 V dc I/O ports . -1.2 V dc at -18 mA to +5.5 V d

9、c Storage temperature range . -65C to +150C Maximum power dissipation (PD) 1/ 1072.5 mW Lead temperature (soldering, 10 seconds) . +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. Supply voltage range (VEE) . +4.

10、5 V dc minimum to +5.5 V dc maximum Minimum high level input voltage (VIH) . +2.0 V dc Maximum low level input voltage (VIL) +0.8 V dc Pulse duration (tW): CBA or CAB high 6.0 ns minimum CBA or CAB low . 7.0 ns minimum Setup time before CAB rising or CBA rising (tS) . 7.0 ns minimum Hold time after

11、CAB rising or CBA rising (th) 0 ns minimum Case operating temperature range (TC) -55C to +125C _ 1/ Maximum power dissipation is defined as VCCx ICC, and must withstand the added PDdue to short circuit test; e.g., IOProvided by IHSNot for ResaleNo reproduction or networking permitted without license

12、 from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88753 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a pa

13、rt of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STAND

14、ARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available

15、online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this dra

16、wing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B

17、devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the man

18、ufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modi

19、fications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specif

20、ied in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Test circu

21、it and switching waveforms. The test circuit and switching waveforms shall be as specified on figure 3. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating t

22、emperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDA

23、RD MICROCIRCUIT DRAWING SIZE A 5962-88753 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufactur

24、ers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devic

25、es built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from

26、a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-3

27、8535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime

28、-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be m

29、ade available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88753 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE

30、I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C 1/ unless otherwise specified Group A subgroups Device type Limits Unit Min Max High level output voltage VOHVCC= 4.5 V, IOH= -2.0 mA 1, 2, 3 All 2.5 V VIL= 0.8 V, IOH= -3.0 mA 2.4 VIH= 2.0 V, IOH= -12 mA 2.0 Low level o

31、utput voltage VOL2/ IOL= 32.0 mA 1, 2, 3 All 0.5 V Input clamp voltage VI CVCC= 4.5 V IIN= -18 mA 1, 2, 3 All -1.2 V Low level input current IILVCC= 5.5 V, Control inputs 1, 2, 3 All -0.5 mA VIN= 0.4 V, A or B ports -0.75 Unused input = 4.5 V High level input current IIH1VCC= 5.5 V, Control inputs 1

32、, 2, 3 All 20 A Unused input = 0.0 V, VIN= 2.7 V A or B ports 70 IIH2VCC= 5.5 V, Unused input = 0.0 V, VIN= 7.0 V Control inputs 1, 2, 3 All 0.1 mA VCC= 5.5 V, Unused input = 0.0 V, VIN= 5.5 V A or B ports 0.1 Output current IOVCC= 5.5 V, VOUT= 2.25 V 3/ 1, 2, 3 All -30 -112 mA Supply current ICCVCC

33、= 5.5 V Outputs high 1, 2, 3 All 185 mA Outputs low 195 Outputs disabled 195 Functional tests See 4.3.1c, VCC= 4.5 V, 5.5 V 7, 8 All Maximum clock frequency 4/ ICCQVCC= 4.5 V and 5.5 V, 9, 10, 11 All 75 MHz Propagation delay time, from CBA or CAB tPLH1CL= 50 pF, 9, 10, 11 All 2 11 ns R1= 500, to A o

34、r B tPHL1R2= 500, See figure 3 5/ 2 10 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88753 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2

35、234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C 1/ unless otherwise specified Group A subgroups Device type Limits Unit Min Max Propagation delay time, from A or B to B or A tPLH2VCC= 4.5 V and 5.5 V, 9, 10, 11 All 2 12 ns tPHL2 CL= 50 pF,

36、 1 8 Propagation delay time, from tPLH3R1= 500, 9, 10, 11 All 2 15 ns SBA or SAB to B or A 6/ tPHL3 R2 = 500, 2 11 Output enable time, tPZH1See figure 3 5/ 9, 10, 11 All 2 11 ns from G BA to A tPZL13 18 Output disable time, tPHZ19, 10, 11 All 2 10 ns from G BA to A tPLZ12 10 Output enable time, tPZH

37、29, 10, 11 All 3 12 ns from GBA to B tPZL23 20 Output disable time, tPHZ29, 10, 11 All 2 11 ns from GBA to B tPLZ22 12 1/ Unused inputs that do not directly control the pin under test must be 2.5 V or 0.4 V. Unused inputs shall not exceed 5.5 V or go less than 0.0 V. No inputs shall be floated. 2/ A

38、ll outputs must be tested. In the case where only one input at VILmaximum or VIHminimum produces the proper output state, the test must be performed with each input being selected as the VILmaximum or VIHminimum input. 3/ The output conditions have been chosen to produce a current that closely appro

39、ximates one half of the true short circuit output current, IOS. Not more than one output shall be tested at one time and the duration of the test condition shall not exdeed 1 second. 4/ This parameter shall be, as a minimum, tested initially and after any process or design changes which may affect t

40、he parameter, otherwise, it is guaranteed to the specified limits in table I for this device. 5/ Propagation delay limits are based on single output switching. Unused outputs = 3.5 V or 0.3 V. 6/ These parameters are measured with the internal output state of the storage registers oppositite to that

41、 of the bus input. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88753 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 Device types 01 01 Case outlines L and K

42、 3 Terminal number Terminal symbols Terminal symbols 1 CAB NC 2 SAB CAB 3 GAB SAB 4 A1 GAB 5 A2 A1 6 A3 A2 7 A4 A3 8 A5 NC 9 A6 A4 10 A7 A5 11 A8 A6 12 GND A7 13 B8 A8 14 B7 GND 15 B6 NC 16 B5 B8 17 B4 B7 18 B3 B6 19 B2 B5 20 B1 B4 21 G BA B3 22 SBA NC 23 CBA B2 24 VCCB1 25 - - - G BA 26 - - - SBA 2

43、7 - - - CBA 28 - - - VCCNC = No connection FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88753 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 8 DSCC F

44、ORM 2234 APR 97 Inputs Data I/O Operation or function GAB G BA CAB CBA SAB SBA A1 thru A8 B1 thru B8 L L H H H or L H or L X X X X Input Input Isolation Store A and B data X H H H H or L X X* X X Input Input Uspecified* Output Store A, hold B Store A in both registers L L X L H or L X X X X* Uspecif

45、ied* Output Input Input Hold A, store B Store B in both registers L L L L X X X H or L X X L H Output Input Real-time B data to A bus Store B data to A bus H H H H X H or L X X L H X X Input Output Real-time A data to B bus Store A data to B bus H L H or L H or L H H Output Output Store A data to B

46、bus and stored B data to A bus H = High voltage level L = Low voltage level X = Irrelevant = Transition from low to high level * = The data output functions may be enabled or disabled by various signals at the GAB or G BA inputs. Data input functions are always enabled; i.e., data at the bus pins wi

47、l be stored on every low-to-high transition on the clock inputs. * = Select control = L; clocks can occur simultaneously. Select control = H; clocks must be staggered in order to load both registers. FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without

48、license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88753 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 9 DSCC FORM 2234 APR 97 FIGURE 3. Test circuit and switching waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88753 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISI