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本文(DLA SMD-5962-88754 REV B-2000 MICROCIRCUIT DIGITAL ADVANCED CMOS 8-INPUT UNIVERSAL SHIFT STORAGE REGISTER WITH THREE-STATE OUTPUTS MONOLITHIC SILICON《硅单片8投入普遍转向 存储调节三态输出互补型金属氧化物半导体.pdf)为本站会员(王申宇)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-88754 REV B-2000 MICROCIRCUIT DIGITAL ADVANCED CMOS 8-INPUT UNIVERSAL SHIFT STORAGE REGISTER WITH THREE-STATE OUTPUTS MONOLITHIC SILICON《硅单片8投入普遍转向 存储调节三态输出互补型金属氧化物半导体.pdf

1、REVISIONSLTR DESCRIPTION DATE (YR -MO -DA) APPROVEDA Add vendor CAGE F8859. Add device class V criteria. Editorial changesthroughout. -gap99-12-22 Raymond MonninB Add case outline X. Add delta limits, table III. Update boilerplate. - CFS 00-09-19 Monica L. PoelkingREVSHEETREV B B B B B BSHEET 15 16

2、17 18 19 20REV STATUS REV B B B B B B B B B B B B B BOF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14PMIC N/A PREPARED BY Marcia B. Kelleher DEFENSE SUPPLY CENTER COLUMBUSSTANDARDMICROCIRCUITDRAWINGCHECKED BYRay MonninCOLUMBUS, OHIO 43216THIS DRAWING IS AVAILABLEFOR USE BY ALLDEPARTMENTSAPPROVED BYM

3、ichael A. Frye MICROCIRCUIT, DIGITAL, ADVANCED CMOS, 8-INPUT UNIVERSAL SHIFT/STORAGEAND AGENCIES OF THEDEPARTMENT OF DEFENSE DRAWING APPROVAL DATE88-02-14REGISTER WITH THREE- STATE OUTPUTS,MONOLITHIC SILICONAMSC N/A REVISION LEVELBSIZEA CAGE CODE 67268 5962-88754SHEET1 OF 20DSCC FORM 2233APR 97 5962

4、 -E514-00DISTRIBUTION STATEMENT A . Approved for public release; distribution is unlimited.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARDMICROCIRCUIT DRAWINGSIZEA 5962-88754DEFENSE SUPPLY CENTER COLUMBUSCOLUMBUS, OHIO 43216-5000 REVISION LE

5、VEL B SHEET 2DSCC FORM 2234APR 971. SCOPE1.1 Scope . This drawing documents two product assurance class levels consisting of high reliability (device classes Q andM) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Partor Iden

6、tifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.1.2 PIN . The PIN is as shown in the following examples.For devi ce classes M and Q:5962 - 88754 01 R X Federal RHA Device Case Lead stock class designator type outline finishdesignat

7、or (see 1.2.1) (see 1.2.2) (see 1.2.4) (see 1.2.5) / Drawing numberFor device class V:5962 - 88754 01 V X X Federal RHA Device Device Case Lead stock class designator type class outline finishdesignator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / ( see 1.2.3)/ Drawing number1.2.1 RH

8、A designator . Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and aremarked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix Aspecified RHA levels and are marked with the appropriate RHA designator. A dash

9、( -) indicates a non -RHA device.1.2.2 Device type(s) . The device type(s) identify the circuit function as follows:Device type Generic number Circuit function01 54AC299 8-input universal shift/storage register withcommon parallel I/O pins, three-state outputs1.2.3 Device class designator . The devi

10、ce class designator is a single letter identifying the product assurance level as listedbelow. Since the device class designator has been added after the original issuance of this drawing, device classes M and Qdesignators will not be included in the PIN and will not be marked on the device.Device c

11、lass Device requirements documentationM Vendor self -certification to the requirements for MIL-STD-883 compliant,non -JAN class level B microcircuits in accordance with MIL-PRF-38535,appendix AQ or V Certification and qualification to MIL-PRF-38535Provided by IHSNot for ResaleNo reproduction or netw

12、orking permitted without license from IHS-,-,-STANDARDMICROCIRCUIT DRAWINGSIZEA 5962-88754DEFENSE SUPPLY CENTER COLUMBUSCOLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 3DSCC FORM 2234APR 971.2.4 Case outline(s) . The case outline(s) are as designated in MIL-STD-1835 and as follows:Outline letter De

13、scriptive designator Terminals Package styleR GDIP1-T20 or CDIP2-T20 20 Dual-in-lineS GDFP2-F20 or CDFP3-F20 20 Flat packX See figure 1. 20 Flat pack2 CQCC1-N20 20 Square leadless chip carrier1.2.5 Lead finish . The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-3

14、8535, appendixA for device class M.1.3 Absolute maximum ratings . 1 /, 2 /, 3 /Supply voltage range (V CC ) -0.5 V dc to +7.0 V dcDC input voltage range (V IN ) -0.5 V dc to V CC + 0.5 V dcDC output voltage range (V OUT ) . -0.5 V dc to V CC + 0.5 V dcClamp diode current (I IK , I OK ) . 20 mADC out

15、put current (per output pin) 50 mADC V CC or GND current (per output pin) . 50 mAMaximum power dissipation (P D ) 500 mWStorage temperature range (T STG ) -65 C to +150 CLead temperature (soldering, 10 seconds) . +300 CThermal resistance, junction -to -case ( JC ) . See MIL -STD -1835Junction temper

16、ature (T J ) +175 C 4 /1.4 Recommended operating conditions . 2 /, 3 /, 5 /Supply voltage range (V CC ) +2.0 V dc to +6.0 V dcInput voltage range (V IN ) . +0.0 V dc to V CCOutput voltage range (V OUT ) +0.0 V dc to V CCCase operating temperature range (T C ) . -55 C to +125 CInput rise or fall time

17、s ( t r , t f ):V CC = 3.6 V and 5.5 V . 0 to 8 ns/V1 / Stresses above the absolute maximum rating may cause permanent da mage to the device. Extended operation at themaximum levels may degrade performance and affect reliability.2 / Unless otherwise noted, all voltages are referenced to GND.3 / The

18、limits for the parameters specified herein shall apply over the full specified V CC range and case temperature rangeof -55 C to +125 C. 4 / Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions inaccordance with method 5004 of MIL-STD-883

19、.5 / Operation from 2.0 V dc to 3.0 V dc is provided for compatibility with data retention and battery back-up systems. Dataretention implies no input transition and no stored data loss with the following conditions : V IH 70% V CC , V IL 30% V CC ,V OH 70% V CC -20 A, V OL 30% V CC 20 A.Provided by

20、 IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARDMICROCIRCUIT DRAWINGSIZEA 5962-88754DEFENSE SUPPLY CENTER COLUMBUSCOLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 4DSCC FORM 2234APR 972. APPLICABLE DOCUMENTS2.1 Government specification, standards, and h

21、andbooks . The following specification, standards, and handbooks form a partof this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in theissue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplemen

22、t thereto, cited in thesolicitation.SPECIFICATIONDEPARTMENT OF DEFENSEMIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.STANDARDSDEPARTMENT OF DEFENSEMIL-STD-883 - Test Method Standard Microcircuits.MIL-STD-973 - Configuration Management.MIL-STD-1835 - Interface Standard

23、For Microcircuit Case Outlines.H ANDBOOKSDEPARTMENT OF DEFENSEMIL-HDBK-103 - List of Standard Microcircuit Drawings (SMDs).MIL-HDBK-780 - Standard Microcircuit Drawings.(Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the StandardizationDocument O

24、rder Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)2.2 Non-Government publications . The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of the documents which are DOD adopted are those listed in the issu

25、e of the DODISScited in the solicitation. Unless otherwise specified, the issues of documents not listed in the DODISS are the issues of thedocuments cited in the solicitation.ELECTRONIC INDUSTRIES ALLIANCE (EIA)JEDEC Standard No. 20 - Standardized for Description of 54/74ACXXXX and 54/74ACTXXXX Adv

26、anced High-SpeedCMOS Devices.(Applications for copies should be addressed to the Electronics Industries Alliance, 2001 Eye Street, NW,Washington, DC 20006.)(Non-Government standards and other publications are normally available from the organizations that prepare or distributethe documents. These do

27、cuments may also be available in or through libraries or other informational services.)2.3 Order of precedence . In the event of a conflict between the text of this drawing and the references cited herein, the text ofthis drawing takes precedence. Nothing in this document, however, supersedes applic

28、able laws and regulations unless aspecific exemption has been obtained.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARDMICROCIRCUIT DRAWINGSIZEA 5962-88754DEFENSE SUPPLY CENTER COLUMBUSCOLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 5DSCC FO

29、RM 2234APR 973. REQUIREMENTS3.1 Item requirements . The individual item requirements for device classes Q and V shall be in accordance withMIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. Themodification in the QM plan shall not affect th

30、e form, fit, or function as described herein. The individual item requirements fordevice class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specifiedherein.3.2 Design, construction, and physical dimensions . The design, construction, and physical d

31、imensions shall be as specifiedin MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M.3.2.1 Case outlines . The case outlines shall be in accordance with 1.2.4 herein and figure 1.3.2.2 Terminal connections . The terminal connections shall b

32、e as specified on figure 2.3.2.3 Truth table . The truth table shall be as specified on figure 3.3.2.4 Logic diagram . The logic diagram shall be as specified on figure 4.3.2.5 Switching waveforms and test circuit . The switching waveforms and test circuit shall be as specified on figure 5.3.3 Elect

33、rical performance characteristics and postirradiation parameter limits . Unless otherwise specified herein, theelectrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the fullcase operating temperature range.3.4 Electrical test req

34、uirements . The electrical test requirements shall be the subgroups specified in table II. The electricaltests for each subgroup are defined in table I.3.5 Marking . The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also bemarked as listed in MIL-HDBK

35、-103. For packages where marking of the entire SMD PIN number is not feasible due to spacelimitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, theRHA designator shall still be marked. Marking for device classes Q and V shall be in

36、accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A.3.5.1 Certification/compliance mark . The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required inMIL-PRF-38535. The compliance mark for device class M shall be

37、 a “C“ as required in MIL-PRF-38535, appendix A.3.6 Certificate of compliance . For device classes Q and V, a certificate of compliance shall be required from a QML -38535listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate

38、ofcompliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see6.6.2 herein). The certificate of compliance submitted to DSCC -VA prior to listing as an approved source of supply for thisdrawing shall affirm that the manufacturers product

39、 meets, for device classes Q and V, the requirements of MIL-PRF-38535 andherein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein.3.7 Certificate of conformance . A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 orfor device class M i

40、n MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing.3.8 Notification of change for device class M . For device class M, notification to DSCC -VA of change of product (see 6.2herein) involving devices acquired to this drawing is required for any chan

41、ge as defined in MIL-STD-973.3.9 Verification and review for device class M . For device class M, DSCC, DSCCs agent, and the acquiring activity retain theoption to review the manufacturers facility and applicable required documentation. Offshore documentation shall be madeavailable onshore at the op

42、tion of the reviewer.3.10 Microcircuit group assignment for device class M . Device class M devices covered by this drawing shall be inmicrocircuit group number 40 (see MIL-PRF-38535, appendix A).Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDA

43、RDMICROCIRCUIT DRAWINGSIZEA 5962-88754DEFENSE SUPPLY CENTER COLUMBUSCOLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 6DSCC FORM 2234APR 974. QUALITY ASSURANCE PROVISIONS4.1 Sampling and inspection . For device classes Q and V, sampling and inspection procedures shall be in accordance withMIL-PRF-385

44、35 or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM planshall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be inaccordance with MIL-PRF-38535, appendix A.4.2 Screening . For

45、device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conductedon all devices prior to qualification and technology conformance inspection. For device class M, screening shall be inaccordance with method 5004 of MIL -STD -883, and shall be conducted on all devices

46、 prior to quality conformance inspection.4.2.1 Additional criteria for device class M .a. Burn -in test , method 1015 of MIL -STD -883.(1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revisionlevel control and shall be made available to the pr

47、eparing or acquiring activity upon request. The test circuit shallspecify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specifiedin test method 1015.(2) T A = +125 C, minimum.b. Interim and final electrical test parameters shall be as specified in t

48、able II herein.4.2.2 Additional criteria for device classes Q and V .a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in thedevice manufacturers QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintainedunder document revision level control of the device manufacturers Technology Review Board (TRB) in accordancewith MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuitshall specify the inputs, outputs, biases, and power dissipation, a

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