DLA SMD-5962-88757 REV C-2013 MICROCIRCUIT DIGITAL HIGH-SPEED CMOS PHASE-LOCKED-LOOP WITH VOLTAGE CONTROLLED OSCILLATOR TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R187-92. - JAK 92-07-10 Thomas M. Hess B Correct title to accurately describe the device function. Add notes to figure 4, switching waveforms and test circuit. Update boilerplate to MIL-PRF-38535 requirements.

2、Editorial changes throughout. LTG 06-11-07 Thomas M. Hess C Update boilerplate paragraphs to the current MIL-PRF-38535 requirements. - LTG 13-01-25 Thomas M. Hess REV SHEET REV SHEET REV STATUS REV C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Monica L. Poel

3、king DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY Monica L. Poelking APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL

4、, HIGH-SPEED CMOS, PHASE-LOCKED-LOOP WITH VOLTAGE CONTROLLED OSCILLATOR, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON DRAWING APPROVAL DATE 90-03-08 REVISION LEVEL C SIZE A CAGE CODE 67268 5962-88757 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E180-13 Provided by IHSNot for ResaleNo reproduction or networ

5、king permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88757 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B m

6、icrocircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-88757 01 E A Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type(s). The device type(s) i

7、dentify the circuit function as follows: Device type Generic number Circuit function 01 54HCT4046A Phase-locked-loop with voltage-controlled oscillator, TTL compatible inputs 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive desig

8、nator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC+ 0.5 V dc DC

9、output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc DC input clamp diode current (IIK) 20 mA DC output clamp diode current (IOK) . 20 mA DC drain current . 25 mA DC VCCor GND current 50 mA Storage temperature range (TSTG) -65C to +150C Maximum power dissipation (PD) . 500 mW 4/ Lead temperature

10、 (soldering, 10 seconds) . +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) . +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Input voltage range (VIN) 0.0 V dc to VCCOutput voltage range (VOUT) . 0.0 V dc to V

11、CCCase operating temperature range (TC) . -55C to +125C Input rise or fall time (tr, tf): VCC= 4.5 V . 0 to 500 ns _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unl

12、ess otherwise specified, all voltages are referenced to ground. 3/ The limits for the parameters specified herein shall apply over the full specified VCCrange and case temperature range of -55C to +125C. 4/ For TC= +100C to +125C, derate linearly at 8 mW/C to 300 mW. Provided by IHSNot for ResaleNo

13、reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88757 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The followi

14、ng specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, Ge

15、neral Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit

16、 Drawings. (Copies of these documents are available online at https:/assist.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to

17、the extent specified herein. Unless otherwise specified, the issues of these documents cited in the solicitation or contract. JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JESD7 - Standard for Description of 54/74HCXXXXX and 54/74HCTXXXXX Advanced High-Speed CMOS Devices. (Copies of these documen

18、ts are available online at http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10thStreet, Suite 240-S Arlington, VA 22201-2107). 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawin

19、g takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B dev

20、ices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufa

21、cturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modific

22、ations shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified

23、 in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Logic diagram. The logic diagram shall be as specified on figure 2. 3.2.4 Switching

24、 waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 3. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88757 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 R

25、EVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The el

26、ectrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufactu

27、rers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devi

28、ces built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from

29、 a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-

30、38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime

31、 -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be

32、made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88757 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE

33、 I. Electrical performance characteristics. Test Symbol Test conditions 1/ -55C TC +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max VOLTAGE-CONTROLLED OSCILLATOR SECTION High level output voltage (VCOOUT) VOHVIN= VIH= 2.0 V min or VIL= 0.8 V max IOH= -20 A CMOS load

34、s VCC= 4.5 V 1, 2, 3 01 4.4 V VIN= VIH= 2.0 V min or VIL= 0.8 V max IOH= -4.0 mA TTL loads VCC= 4.5 V 3.7 Low level output voltage (VCOOUT) VOLVIN= VIH= 2.0 V min or VIL= 0.8 V max IOL= +20 A CMOS loads VCC= 4.5 V 1, 2, 3 01 0.1 V VIN= VIH= 2.0 V min or VIL= 0.8 V max IOL= +4.0 mA TTL loads VCC= 4.5

35、 V 0.4 High level input voltage (INH) 2/ VIHVCC= 4.5 V to 5.5 V 1, 2, 3 01 2.0 V Low level input voltage (INH) 2/ VILVCC= 4.5 V to 5.5 V 1, 2, 3 01 0.8 V Input leakage current (INH, VCOIN) 3/ IINVCC= 5.5 V GND VIN VCC1 01 0.1 A 2, 3 1.0 R1 and R2 range 4/ RRNGVCC= 4.5 V 5/ 1 01 3.0 300 k C1 capacita

36、nce range 4/ CRNGVCC= 4.5 V 4 01 0.0 6/ pF VCOINoperating voltage range 4/ 7/ VOPVCC= 4.5 V 1 01 0.9 3.2 V Frequency stability with temperature change 4/ f/T R1 = 100 k, R2 = VCC= 4.5 V 9 01 0.11 %/C Maximum frequency 4/ fMAXC1 = 50 pF, R1 = 3.5 k R2 = , VCC= 4.5 V 9 01 24 MHz C1 = 0 pF, R1 = 9.1 k

37、R2 = , VCC= 4.5 V 9 38 Center frequency 4/ fCTRC1 = 40 pF, R1 = 3 k R2 = , VCC= 4.5 V, VCOIN= VCC/2 9 01 17 MHz Frequency linearity 4/ fVCOC1 = 100 pF, R1 = 100 k R2 = , VCC= 4.5 V 9 01 0.4 % Offset frequency 4/ fOFFC1 = 1 nF, R2 = 220 k VCC= 4.5 V 9 01 400 kHz See footnotes at end of table. Provide

38、d by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88757 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Sy

39、mbol Test conditions 1/ -55C TC +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max DEMODULATOR SECTION Resistor range 4/ RSAt RS 300 k leakage current can influence VDEM(OUT), VCC= 4.5 V 1 01 50 300 k Offset voltage, VCOINto VDEM4/ VOFFVIN= VVCO(IN)= VCC/2, values tak

40、en over RSrange, VCC= 4.5 V 1 01 20.0 mV Output resistance at DEMOUT4/ RDVDEM(OUT)= VCC/2 VCC= 4.5 V 1 01 25 Quiescent current ICCVIN= VCCor GND VCC= 5.5 V 1 01 8 A 2, 3 160 Additional quiescent device current 3/ ICCVIN = 2.4 V VCC= 4.5 V to 5.5 V 1 01 360 A 2, 3 490 Output voltage versus input freq

41、uency 3/ VOUT/ fINR1 = 100 k, R2 = , R3 = 100 k RS= 10 k, C1 = 100 pF, C2 = 100 pF, VCC= 4.5 V 1 01 330 mV/kHz PHASE COMPARATOR SECTION High level output voltage (PCPOUT, PCnOUT) VOHVIN= VIHmin or VILmax IOH= -20 A CMOS loads VCC= 4.5 V 1, 2, 3 01 4.4 V VIN= VIHmin or VILmax IOH= -4.0 mA TTL loads V

42、CC= 4.5 V 3.7 Low level output voltage (PCPOUT, PCnOUT) VOLVIN= VIHmin or VILmax IOL= +20 A CMOS loads VCC= 4.5 V 1, 2, 3 01 0.1 V VIN= VIHmin or VILmax IOL= +4.0 mA TTL loads VCC= 4.5 V 0.4 High level input voltage (SIGIN, COMPIN, DC coupled) 2/ VIHVCC= 4.5 V 1, 2, 3 01 3.15 V Low level input volta

43、ge (SIGIN, COMPIN, DC coupled) 2/ VILVCC= 4.5 V 1, 2, 3 01 1.35 V Input leakage current (SIGIN, COMPIN) 3/ IINVCC= 5.5 V GND VIN VCC1 01 30 A 2, 3 45 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT

44、 DRAWING SIZE A 5962-88757 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Test conditions 1/ -55C TC +125C unless otherwise specified Group A subgroups Device type Limits Unit Min M

45、ax Three-state off-state current (PC2OUT) 3/ IOZVIN= VCCor GND VCC= 5.5 V 1 01 0.5 A 2, 3 10.0 Input resistance (SIGIN, COMPIN) 3/ RINVCC= 4.5 V, V1= 0.5 V V1at self-bias operating point 1, 2, 3 01 250 k Propagation delay time, SIGIN, COMPINto PC1OUT3/ tPLH1, tPHL1VCC= 4.5 V CL= 50 pF minimum See fi

46、gure 3 9 01 45 ns 10, 11 68 Propagation delay time, SIGIN, COMPINto PCPOUTtPLH2, tPHL29 01 68 ns 10, 11 102 Propagation delay time, SIGIN, COMPINto PC3OUTtPLH3, tPHL39 01 58 ns 10, 11 87 Propagation delay time, output enable, SIGIN, COMPINto PC2OUT3/ tPZH, tPZL9 01 60 ns 10, 11 90 Propagation delay

47、time, output disable, SIGIN, COMPINto PC2OUT3/ tPHZ, tPLZ9 01 68 ns 10, 11 102 Transition time 8/ tTHL, tTLH9 01 15 ns 10, 11 22 1/ For a power supply of 5 V 10 percent, the worst case output voltages (VOHand VOL) occur for HCT at 4.5 V. Thus, the 4.5 V values should be used when designing with this

48、 supply. Worst cases VIHand VILoccur at VCC= 5.5 V and 4.5 V, respectively. 2/ The VIHand VILtests are not required, and shall be applied as forcing functions for the VOHand VOLtests. 3/ Guaranteed if not tested to the limits specified in table I. 4/ This parameter is characterization data, and is guaranteed, if not tested, to the limits specified in table I. 5/ The value for R1 and R2 in parallel should exceed 2.7 k. 6/ No maximum limit for C1 capacitance range. 7/ The maximum operating voltage can be as high as VCC