1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance width NOR 5962-R064-93. - drw 93-01-11 Michael A. Frye B Update drawing to current requirements. Editorial changes throughout. drw 02-09-04 Raymond Monnin THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. REV SHET R
2、EV SHET REV STATUS REV B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Gary Zahn DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Charles E. Besore COLUMBUS, OHIO 43216 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPA
3、RTMENTS APPROVED BY William K. Heckman MICROCIRCUIT, LINEAR, CMOS, MICROPROCESSOR COMPATIBLE, DUAL 12-BIT AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 89-8-8 DIGITAL-TO-ANALOG CONVERTERS, MONOLITHIC SILICON AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-88765 SHEET 1 OF 12
4、DSCC FORM 2233 APR 97 5962-E535-02 DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88765 DEFENSE SUPPLY CENTER COLUMBUS COLUMBU
5、S, OHIO 43216-5000 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as s
6、hown in the following example: 5962-88765 01 R A Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function Relative accuracy 01 7549S Dual, CMO
7、S, 12-bit DAC 1.0 LSB 02 7549T Dual, CMOS, 12-bit DAC 0.5 LSB 1.2.2 Case outline. The case outline is as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 dual-in-line 1.2.3 Lead finish. The lead finish is as specifie
8、d in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. VDDto DGND -0.3 V dc to +17 V dc VREFA, VREFBto AGND 25 V dc VRFBA, VRFBBto AGND 25 V dc Digital input to DGND -0.3 V dc to VDDVPIN15, VPIN17to DGND -0.3 V dc to VDDAGND to DGND -0.3 V dc to VDDStorage temperature range. -65C to +150C Lea
9、d temperature (soldering, 10 seconds). +300C Power dissipation (PD) +450 mW 1/ Thermal resistance, junction-to-case (JC). See MIL-STD-1835 Thermal resistance, junction-to-ambient (JA) +120C/W Junction temperature (TJ). +175C 1.4 Recommended operating conditions. Supply voltage (VDD) . +14.25 V dc to
10、 +15.75 V dc A-reference voltage (VREFA) +10 V dc B-reference voltage (VREFB) +10 V dc Ambient operating temperature range (TA) -55C to +125C 1/ Derate above TA= +75C at +6.0 mW/C. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT
11、 DRAWING SIZE A 5962-88765 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the
12、extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solicitation. SPECIFICATION DEPARTMENT OF DEFENSE MIL-PRF-38535 - Integrat
13、ed Circuits, Manufacturing, General Specification for. STANDARDS DEPARTMENT OF DEFENSE MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. HANDBOOKS DEPARTMENT OF DEFENSE MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HD
14、BK-780 - Standard Microcircuit Drawings. (Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict b
15、etween the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirem
16、ents shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional cert
17、ification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein.
18、These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and phys
19、ical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2
20、3 Truth table. The truth table shall be as specified on figure 2. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical t
21、est requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 596
22、2-88765 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/, 2/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min MaxResolution RES Guar
23、anteed minimum resolution 1, 2, 3 All 12 Bits Relative accuracy RA 1, 2, 3 01 1.0 LSB 1 02 1.0 2, 3, 12 0.5 Differential nonlinearity DNL Guaranteed monotonic to 12-bits 1, 2, 3 All 1.0 LSB Gain error 3/ AE1, 2, 3 01 6.0 LSB 1 02 6.0 2, 3, 12 3.0 Supply rejection PSRR VDD= 5.0%, 1 All 0.01 %/% (Gain
24、/VDD) full scale outputs 2, 3 0.02 Output leakage current IOUTADAC A loaded with all 0s 1 All 20 nA 2, 3 250 IOUTBDAC B loaded with all 0s 1 All 20 nA 2, 3 250 Output current settling time to 0.01% of FSR 4/ tSLIOUTload = 100, CEXT= 13 pF, DAC output measured from falling edge of WR 4 All 1.5 s Feed
25、through error, VREFAto IOUTAor VREFBto IOUTB4/ 5/ FT VREFA= VREFB= 20 Vpp, 10 kHz sine wave, DAC register loaded with all 0s 4 All -65 dB Reference input resistance RIN1, 2, 3 All 7.0 18 k Reference input resistance RMIN1, 2, 3 01 3.0 % match (VREFA/VREFB) 1 02 3.0 2, 3, 12 2.0 See footnotes at end
26、of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88765 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characte
27、ristics - continued. Test Symbol Conditions 1/, 2/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min MaxDigital input high voltage VIH1, 2, 3 All 2.4 V Digital input low voltage VIL1, 2, 3 All 0.8 V Input leakage current IINVIN= VDD1 All 1.0 A 2, 3 10 Input capac
28、itance 4/ CIN4 All 7.0 pF Analog output capacitance COUTADAC A = all 0s 4 All 80 pF 4/ DAC A = all 1s 160 Analog output capacitance COUTBDAC B = all 0s 4 All 80 pF 4/ DAC B = all 1s 160 Functional test See 4.3.1c 7, 8 All Address valid to write setup time tAWSSee figure 3 9 All 50 ns 10, 11 110 Addr
29、ess valid to write hold time tAWHSee figure 3 9, 10, 11 All 0 ns Data setup time tDSSee figure 3 9 All 180 ns 10, 11 240 Data hold time tDHSee figure 3 9, 10, 11 All 5 ns Chip select or update to write setup time tCWSSee figure 3 9, 10, 11 All 20 ns Chip select or update to write hold time tCWHSee f
30、igure 3 9, 10, 11 All 0 ns Write pulse width tWRSee figure 3 9 All 170 ns 10, 11 250 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88765 DEFENSE SUPPLY CENTER COLUMBUS COLUMBU
31、S, OHIO 43216-5000 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - continued. Test Symbol Conditions 1/, 2/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min MaxClear pulse width tCLRSee figure 3 9 All 170 ns 10, 1
32、1 250 Supply current IDD1, 2, 3 All 5.0 mA 1/ VREFA= VREFB= +10 V, VPIN15= VPIN16= VPIN17= 0 V unless other wise specified. All tests are guaranteed over a supply voltage range of VDD= 15 V 5.0%, however, all measurements are made at VDD= +15 V unless other wise specified. 2/ Subgroups 10 and 11, if
33、 not tested, shall be guaranteed to the limits specified in table I. 3/ Measured using internal feedback resistor and includes effects of leakage current and gain temperature coefficient. 4/ Subgroup 4 (tSL, FT, CIN, COUTAand COUTBmeasurements) shall be measured only for the initial test and after p
34、rocess or design changes which may affect these tests. 5/ Feedthrough can be further reduced by connecting the metal lid to ground. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88765 DEFENSE SUPPLY CENTER
35、COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 Device types All Case outline R Terminal number Terminal symbol 1 DB3 2 DB2 3 DB1 4 DB0 5 UPD 6 A27 A1 8 A09 CS 10 WR 11 CLR 12 DGND 13 VREFB14 RFBB15 IOUTB16 AGND17 IOUTA18 RFBA19 VREFA20 VDDFIGURE 1. Terminal connect
36、ions. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88765 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 CLR UPD CS WR A2 A1 A0 Function 0 X X 1 X X
37、X No data transfer 0 1 1 X X X X No data transfer 1 X X X X X X All register cleared 0 1 0 0 0 0 DAC A low nibble register loaded from data bus 0 1 0 0 0 1 DAC A mid nibble register loaded from data bus 0 1 0 0 1 0 DAC A high nibble register loaded from data bus 0 1 0 0 1 1 DAC A register loaded fro
38、m input registers 0 1 0 1 0 0 DAC B low nibble register loaded from data bus 0 1 0 1 0 1 DAC B mid nibble register loaded from data bus 0 1 0 1 1 0 DAC B high nibble register loaded from data bus 0 1 0 1 1 1 DAC B register loaded from input registers 0 0 1 X X X DAC A, DAC B registers updated simult
39、aneously from input registers 0 = Logic low level 1 = Logic high level X = Dont care FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88765 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO
40、43216-5000 REVISION LEVEL B SHEET 9 DSCC FORM 2234 APR 97 Notes: 1. All input signal rise and fall times are measured from 10% to 90% of +5.0 V, tr= tf= 20 ns. 2. Timing measurement reference level is 2V V ILIH +FIGURE 3. Timing diagram. Provided by IHSNot for ResaleNo reproduction or networking per
41、mitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88765 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 10 DSCC FORM 2234 APR 97 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the P
42、IN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked as listed in MIL-HDBK-103 (see 6.6 herein). For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1
43、 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow opt
44、ion is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply sh
45、all affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing.
46、 3.8 Notification of change. Notification of change to DSCC-VA shall be required in accordance with MIL-PRF-38535, appendix A. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offs
47、hore documentation shall be made available onshore at the option of the reviewer. 4. QUALITY ASSURANCE PROVISIONS 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of
48、 MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015 of MIL-
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