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本文(DLA SMD-5962-89463 REV D-2005 MICROCIRCUIT DIGITAL HIGH SPEED CMOS FLOATING POINT COPROCESSOR MONOLITHIC SILICON《硅单片浮点运算的协处理器高速互补型金属氧化物半导体数字微电路》.pdf)为本站会员(diecharacter305)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-89463 REV D-2005 MICROCIRCUIT DIGITAL HIGH SPEED CMOS FLOATING POINT COPROCESSOR MONOLITHIC SILICON《硅单片浮点运算的协处理器高速互补型金属氧化物半导体数字微电路》.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R060-93. 93-01-06 Monica L. Poelking B Changes in accordance with NOR 5962-R139-93. 93-04-20 Monica L. Poelking C Incorporated revisions A and B. Tehcnical changes to table I. Updated boilerplate and editorial

2、changes throughout. - LTG 00-07-14 Monica L. Poelking D Update boilerplate to MIL-PRF-38535 requirements. - CFS 05-10-04 Thomas M. Hess REV SHEET REV D D D D D D D D D D SHEET 15 16 17 18 19 20 21 22 23 24 REV D D D D D D D D D D D D D D REV STATUS OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PM

3、IC N/A PREPARED BY Chris Rauch CHECKED BY Thomas M. Hess DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil APPROVED BY Monica L. Poelking DRAWING APPROVAL DATE 92-08-03 MICROCIRCUIT, DIGITAL, HIGH SPEED CMOS, FLOATING POINT COPROCESSOR, MONOLITHIC SILICON SIZE A CAGE CO

4、DE 67268 5962-89463 STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A REVISION LEVEL D SHEET 1 OF 24 DSCC FORM 2233 APR 97 5962-E432-05 Provided by IHSNot for ResaleNo reproduction or networking permitted without lic

5、ense from IHS-,-,-SIZE A 5962-89463 STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in a

6、ccordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-89463 01 X X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit

7、function as follows: Device type Generic number Circuit function 01 68882-16 HCMOS floating point coprocessor 02 68882-20 HCMOS floating point coprocessor 03 68882-25 HCMOS floating point coprocessor 04 68882-33 HCMOS floating point coprocessor 1.2.2 Case outline(s). The case outline(s) are as desig

8、nated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X CMGA2-P68 68 Pin grid array Y See figure 1. 68 Leaded chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range

9、 (VCC) -0.3 V dc to +7 V dc Storage temperature range (TSTG) -65C to +150C Case operating temperature range (TC) . -55C to +125C Maximum power dissipation (PD) 0.75 W 1/ Lead temperature (soldering, 5 seconds). +270C Junction temperature (TJ). +150C Thermal resistance, junction-to-case (JC): Case X

10、See MIL-STD-1835 Case Y 10C/W 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc to +5.5 V dc High level input voltage (logic inputs) (VIH). +2.0 V dc to VCCLow level input voltage (logic inputs) (VIL) GND - 0.3 V dc to 0.8 V dc Minimum high level output voltage (VOH) +2.4 V

11、dc Maximum low level output voltage (VOL). +0.5 V dc Frequency of operation: Device type 01 12.5 to 16.67 MHz Device type 02 12.5 to 20.0 MHz Device type 03 12.5 to 25 MHz Device type 04 16.67 to 33.33 MHz _ 1/ Must withstand the added PDdue to short circuit test; e.g., IOS. Provided by IHSNot for R

12、esaleNo reproduction or networking permitted without license from IHS-,-,-SIZE A 5962-89463 STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handb

13、ooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits,

14、Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Stan

15、dard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of

16、a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual i

17、tem requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted trans

18、itional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requireme

19、nts herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, constructi

20、on, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein and on figure 1. 3.2.2 Terminal connections. The terminal connections shall be

21、 as specified on figure 2. 3.2.3 Functional block diagram. The functional block diagram shall be as specified on figure 3. 3.2.4 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherw

22、ise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each

23、subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SIZE A 5962-89463 STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 3.5 Marking. Ma

24、rking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the o

25、ption of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance

26、 with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-V

27、A prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with

28、 each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers fac

29、ility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SIZE A 5962-89463 STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER C

30、OLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Limits Test Symbol Conditions 1/ -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified Device type Group A subgroups Min Max Unit Input high voltage VIHAll 1, 2, 3 2.0

31、 VCCV Input low voltage VILAll 1, 2, 3 -0.3 0.8 V High level output voltage, DSACK0, DSACK1, D0 D31 VOHIOH= -400 A All 1, 2, 3 2.4 V Low level output voltage, DSACK0, DSACK1, D0 D31 VOLIOL= 5.3 mA All 1, 2, 3 0.5 V Input leakage current, CLK, RESET, R/W, A0 A4, CS, DS, AS SIZE IINVCC= 5.5 V All 1, 2

32、, 3 10 A High impedance (off-state), DSCK0, DSCK1, D0 D31 ITSIVIN= 2.4 V/0.4 V All 1, 2, 3 20 A Supply current 2/ ICCVCC= 5.5 V All 1, 2, 3 150 mA Output low current, 3/ (VOL= GND) SENSE IOLAll 1, 2, 3 500 A Input capacitance CINVIN= 0.0 V, fC= 1 MHz See 4.3.1d All 4 20 pF Functional tests VCC= 4.5

33、V See 4.3.1c All 7, 8 01 12.5 16.7 02 12.5 20.0 03 12.5 25.0 Frequency of operation 4/ fMAXGND = 0.0 V 04 16.67 33.33 MHz 01 60 125 02 50 80 03 40 80 Cycle time 1 04 9, 10, 11 30 60 ns 01 60 125 02 50 80 03 40 80 Clock pulse width (Measured from 1.5 V to 1.5 V for 33MHz) 2, 3 04 9, 10, 11 30 60 ns 0

34、1 5 02 03 4 Clock fall time 4 See figure 4. 04 9, 10, 11 3 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SIZE A 5962-89463 STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVI

35、SION LEVEL D SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits Test Symbol Conditions 1/ -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified Device type Group A subgroups Min Max Unit 01 5 02 03 4 Clock rise time 5 04 9, 10, 11 3 ns 01 15 02 10 03

36、 5 Address valid to AS asserted 5/ 6 04 9, 10, 11 5 ns 01 15 02 10 03 5 Address valid to DS asserted (read) 5/ 6A 04 9, 10, 11 5 ns 01 50 02 50 03 35 Address valid to DS asserted (write) 5/ 6B 04 9, 10, 11 26 ns 01, 02 10 AS negated to address invalid 6/ 7 03, 04 9, 10, 11 5 ns 01, 02 10 DS negated

37、to address invalid 6/ 7A 03, 04 9, 10, 11 5 ns 01, 02 0 CS negated to AS asserted 7/ 8 03, 04 9, 10, 11 0 ns 01, 02 0 CS negated to DS asserted (read) 7/ 8A 03, 04 9, 10, 11 0 ns 01 30 02 25 03 20 CS asserted to DS asserted (write) 8B 04 9, 10, 11 15 ns 01, 02 10 AS negated to CS negated 9 03, 04 9,

38、 10, 11 5 ns 01, 02 10 DS negated to CS negated 9A 03, 04 9, 10, 11 5 ns 01 15 02 10 R/W high to AS asserted (read) 10 03, 04 9, 10, 11 5 ns 01 15 02 10 R/W high to DS asserted (read) 10A See figure 4. 03, 04 9, 10, 11 5 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction

39、or networking permitted without license from IHS-,-,-SIZE A 5962-89463 STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits Test Symbol Conditions 1/ -

40、55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified Device type Group A subgroups Min Max Unit 01 35 02 30 R/W low to DS asserted (write) 10B 03, 04 9, 10, 11 25 ns 01, 02 10 AS negated to R/W low (read) or AS negated to R/W high (write) 11 03, 04 9, 10, 11 5 ns 01, 02 10 DS negated to R/W low (

41、read) or DS negated to R/W high (write) 11A 03, 04 9, 10, 11 5 ns 01 40 02 38 03 30 DS width asserted (write) 12 04 9, 10, 11 23 ns 01 40 02 38 03 30 DS width negated 3/ 13 04 9, 10, 11 23 ns 01, 02 30 03 25 DS negated to AS asserted 3/ 8/ 13A 04 9, 10, 11 18 ns 01 80 02, 03 45 CS, DS asserted to da

42、ta out valid (read) 9/ 14 04 9, 10, 11 30 ns 01, 02 0 DS negated to data out invalid (read) 15 03, 04 9, 10, 11 0 ns 01 50 02, 03 35 DS negated to data out high impedance (read) 3/ 16 04 9, 10, 11 30 ns 01 15 02 10 Data invalid to DS asserted (write) 17 03, 04 9, 10, 11 5 ns 01 15 02 10 DS negated t

43、o data in invalid (write) 18 See figure 4. 03, 04 9, 10, 11 5 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SIZE A 5962-89463 STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 R

44、EVISION LEVEL D SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits Test Symbol Conditions 1/ -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified Device type Group A subgroups Min Max Unit 01 50 02 35 03 25 START true to DSACK0 and DSACK1 asserted 9

45、/ 19 04 9, 10, 11 20 ns 01 -15 15 02, 03 -10 10 DSACK0 asserted to DSACK1 asserted (skew) 10/ 19A 04 9, 10, 11 5 ns 01 50 02 43 03 32 DSACK0 or DSACK1 asserted to data out valid 20 04 9, 10, 11 17 ns 01 50 02, 03 40 START false to DSACK0 and DSACK1 negated 11/ 21 04 9, 10, 11 30 ns 01 70 02, 03 55 S

46、TART false to DSACK0 and DSACK1 high impedance 3/ 11/ 22 04 9, 10, 11 40 ns 01, 02 0 START true to clock high (synchronous read) 11/ 12/ 23 03, 04 9, 10, 11 0 ns 01 105 02 80 03 60 Clock low to data out valid (synchronous read) 12/ 24 04 9, 10, 11 45 ns 105+ ns 01 1.5 2.5 clks 80+ ns 02 1.5 2.5 clks

47、 60+ ns 03 1.5 2.5 clks 45+ ns START true to data out valid (synchronous read) 11/ 12/ 13/ 25 04 9, 10, 11 1.5 2.5 clks 01 75 02 55 03 45 Clock low to DSACK0 and DSACK1 asserted (asynchronous read) 12/ 26 See figure 4. 04 9, 10, 11 30 ns See footnotes at end of table. Provided by IHSNot for ResaleNo

48、 reproduction or networking permitted without license from IHS-,-,-SIZE A 5962-89463 STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 9 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits Test Symbol Conditions 1/ -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified Device type Group A subgroups Min Max Unit 75+ ns 01 1.5 2.5 clks 55+ ns 02 1.5 2.5 clks 45+ ns 03 1.5 2.5 clks 30+ ns START true to DSACK0 and DS

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