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本文(DLA SMD-5962-89513 REV C-2010 MICROCIRCUIT DIGITAL FAST CMOS OCTAL-D-REGISTER WITH THREE-STATE OUTPUTS TTL COMPATIBLE MONOLITHIC SILICON.pdf)为本站会员(confusegate185)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-89513 REV C-2010 MICROCIRCUIT DIGITAL FAST CMOS OCTAL-D-REGISTER WITH THREE-STATE OUTPUTS TTL COMPATIBLE MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R070-92. - JAK 92-01-13 Monica L. Poelking B Correct title to accurately describe device function. Update boilerplate to MIL-PRF-38535 requirements. Editorial changes throughout. - LTG 06-08-01 Thomas M. Hess C

2、 Add footnote 4/ for ICCtests in table I. jak 10-01-19 Thomas M. Hess REV SHET REV SHET REV STATUS REV B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Monica L. Poelking DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Ray Monnin COLUMBU

3、S, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, FAST CMOS, OCTAL- D-REGISTER WITH THREE-STATE OUTPUTS, TTL COMPATIBLE, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE

4、89-04-07 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-89513 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E076-10 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89513 DEFENSE SUPPLY CENTER COLUMBUS COLUM

5、BUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as

6、 shown in the following example: 5962-89513 01 R ADrawing number Device type (see 1.2.1) Case outline(see 1.2.2)Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54FCT574 Octal D register with three

7、-state outputs, TTL compatible 02 54FCT574A Octal D register with three-state outputs, TTL compatible 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line S

8、GDFP2-F20 or CDFP3-F20 20 Flat pack 2 CQCC1-N20 20 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC+ 0.5 V dc

9、2/ DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc 2/ DC input diode current (IIK) . -20 mA DC output diode current (IOK) . -50 mA DC output current (IOUT) . 100 mA Storage temperature range (TSTG) -65C to +150C Maximum power dissipation (PD) . 500 mW 3/ Lead temperature (soldering, 10 s

10、econds) . +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) . +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Maximum low level input voltage (VIL) 0.8 V dc Minimum high level input voltage (VIH) . 2.0 V dc Case

11、 operating temperature range (TC) . -55C to +125C Minimum setup time, Dn to CP, high or low (ts): Device type 01 2.5 ns Device type 02 2.0 ns Minimum hold time, Dn to CP, high or low (th): Device type 01 2.0 ns Device type 02 1.5 ns Minimum CP pulse width, high and low (tw): Device type 01 7.0 ns De

12、vice type 02 6.0 ns 1/ Unless otherwise specified, all voltages are referenced to ground. 2/ For VCC 6.5 V dc, the upper bound is limited to VCC. 3/ Must withstand the added PDdue to short circuit test, e.g., IOS. Provided by IHSNot for ResaleNo reproduction or networking permitted without license f

13、rom IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89513 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks fo

14、rm a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENS

15、E STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are ava

16、ilable online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of t

17、his drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class l

18、evel B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with

19、the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. The

20、se modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as

21、 specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Log

22、ic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance character

23、istics are as specified in table I and shall apply over the full case operating temperature range. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89513 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-399

24、0 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix

25、A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Cert

26、ification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option i

27、s used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall a

28、ffirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8

29、Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore docu

30、mentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89513 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5

31、 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC+125C VCC= 5.0 V dc 10% unless otherwise specified Group A subgroups Device type Limits Unit Min Max High level output voltage VOHVCC= 4.5 V VIL= 0.8 V VIH= 2.0 V IOH= -300 A 1, 2, 3 All 4.3 V IOH=

32、-12 mA 2.4 Low level output voltage VOLVCC= 4.5 V VIL= 0.8 V VIH= 2.0 V IOL= 300 A 1, 2, 3 All 0.2 V IOL= 32 mA 0.5 Input clamp voltage VIKVCC= 4.5 V, IIN= -18 mA 1, 2, 3 All -1.2 V High level input current IIHVCC= 5.5 V, VIN= 5.5 V 1, 2, 3 All 5.0 A Low level input current IILVCC= 5.5 V, VIN= GND 1

33、, 2, 3 All -5.0 A Off-state output current, high IOZHVCC= 5.5 V, VIN= 5.5 V 1, 2, 3 All 10 A Off-state output current, low IOZLVCC= 5.5 V, VIN= GND 1, 2, 3 All -10 A Short circuit output current IOS1/ VCC= 5.5 V, VOUT= 0.0 V 1, 2, 3 All -60 mA Quiescent power supply current (CMOS inputs) ICCQ2/ VIN

34、0.2 V or VIN 5.3 V VCC= 5.5 V, fI= fCP= 0.0 MHz 1, 2, 3 All 1.5 mA Quiescent power supply current (TTL inputs) ICCVCC = 5.5 V, VIN = 3.4 V 1, 2, 3 All 2.0 mA Dynamic power supply current ICCD3/ 4/ VCC= 5.5 V, OE = GND VIN 0.2 V or VIN 5.3 V One bit toggling, 50% duty cycle Outputs open CL= 50 pF 1,

35、2, 3 All 0.4 mA/ MHz Total power supply current ICC4/ 5/ VCC= 5.5 V fCP= 10 MHz 50% duty cycle Outputs open Eight bits toggling at fI= 2.5 MHz 50% duty cycle OE = GND VIN 0.2 V or VIN 5.3 V 1, 2, 3 All 5.5 mA VIN 3.4 V or VIN= GND 1, 2, 3 All 6.0 mA Input capacitance CINSee 4.3.1c 4 All 10 pF Output

36、 capacitance COUTSee 4.3.1c 4 All 12 pF Functional tests See 4.3.1d 7, 8 All See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89513 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO

37、43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions -55C TC+125C VCC= 5.0 V dc 10% unless otherwise specified Group A subgroups Device type Limits Unit Min Max Propagation delay time, CP to On tPLH, tPHL6/ CL= 50

38、 pF minimum RL= 500 See figure 4 9, 10, 11 01 2.0 11.0 ns 02 2.0 7.2 Propagation delay time, output enable tPZH, tPZL6/ 9, 10, 11 01 1.5 14.0 ns 02 1.5 7.5 Propagation delay time, output disable tPHZ, tPLZ6/ 9, 10, 11 01 1.5 8.0 ns 02 1.5 6.5 1/ Not more than one output should be shorted at one time

39、, and the duration of the short circuit condition should not exceed one second. 2/ TTL driven input (VIN= 3.4 V); all other inputs at VCCor GND. 3/ This parameter is not directly testable, but is derived for use in total power supply calculations. 4/ For ICCtests, in an ATE environment, the effect o

40、f parasitic output capacitive loading from the test environment must be taken into account,as its effect is not intended to be included in the test results. The impact must be characterized and appropriate offsetfactors must be applied to the test result.“ 5/ ICC= ICCQ+ (ICCx DHx NT) + (ICCD(fCP/2 +

41、 fIx NI) where: DH= Duty cycle for TTL inputs high. NT= Number of TTL inputs at DH. fI= Input frequency in MHz. NI= Number of inputs at fI. fCP= Clock frequency for register devices. 6/ The minimum limits are guaranteed, if not tested, to the limits specified in table I. Provided by IHSNot for Resal

42、eNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89513 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 Device types 01 and 02 Case outlines R, S, and 2 Terminal number Terminal symb

43、ol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 OE D0 D1 D2 D3 D4 D5 D6 D7 GND CP O7 O6 O5 O4 O3 O2 O1 O0 VCCFIGURE 1. Terminal connections. Device types 01 and 02 Function Inputs Outputs OE CP Dn On HI-Z H L X Z H H X Z Load Register L L L L H H H L Z H H Z H = High voltage level L = Low volt

44、age level Z = High impedance state X = Irrelevant = Low-to-high transition FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89513 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990

45、 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89513 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 9

46、 DSCC FORM 2234 APR 97 FIGURE 4. Switching waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89513 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 10

47、DSCC FORM 2234 APR 97 NOTES: 1. RL= 500 or equivalent 2. CL= 50 pF or equivalent (includes test jig and probe capacitance). 3. Pulse generator for all pulses: PRR 1.0 MHz; ZOUT 50; tr 2.5 ns; tf 2.5 ns FIGURE 4. Switching waveforms and test circuit Continued. Provided by IHSNot for ResaleNo reproduc

48、tion or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89513 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 11 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance wi

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