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本文(DLA SMD-5962-89526 REV C-2012 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED SCHOTTKY TTL SYNCHRONOUS 8-BIT UP DOWN COUNTER MONOLITHIC SILICON.pdf)为本站会员(sofeeling205)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-89526 REV C-2012 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED SCHOTTKY TTL SYNCHRONOUS 8-BIT UP DOWN COUNTER MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Technical change to 1.4. Added footnote 5 to table I. Editorial changes throughout. 90-12-04 W. Heckman B Update to reflect latest changes in format and requirements. Editorial changes throughout. -les 04-08-10 Raymond Monnin C Update drawing as

2、part of 5 year review. -jt 12-01-19 C. SAFFLE THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. REV SHEET REV SHEET REV STATUS REV C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY Christopher A. Rauch DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.lan

3、dandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY Wm. J. Johnson APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED SCHOTTKY, TTL, SYNCHRONOUS 8-BIT, UP/DOWN COUNTER, MONOLITH

4、IC SILICON DRAWING APPROVAL DATE 89-02-24 AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-89526 SHEET 1 OF 10 DSCC FORM 2233 APR 97 5962-E128-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89526 DLA

5、 LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN)

6、. The complete PIN is as shown in the following example: 5962-89526 01 L A Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type. The device type identify the circuit function as follows: Device type Generic number Circuit function 01 54AS869 Synch

7、ronous 8-bit up/down counter 1.2.2 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style L GDIP3-T24 or CDIP4-T24 24 dual-in-line K GDFP2-F24 or CDFP3-F24 24 flat 3 CQCC1-N28 28 square chip carrier 1.2.3 Lead

8、finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range . -0.5 V dc minimum to +7.0 V dc maximum Input voltage range . -1.2 V dc at 18 mA to +7.0 V dc Storage temperature range -65C to +150C Maximum power dissipation (PD) . 990 mW 1/ L

9、ead temperature (soldering, 10 seconds) +300C Junction temperature (TJ) +175C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc minimum to +5.5 V dc maximum Minimum high level input voltage (VIH) . 2.0 V dc Maximum

10、 low level input voltage (VIL) 0.8 V dc Maximum high level output current (IOH) -2.0 mA Maximum low level output current (IOL) 20 mA Case operating temperature range (TC) . -55C to +125C Clock frequency (fCLK) 0 MHz 40 MHz _ 1/ Maximum power dissipation is defined as VCCX ICC, and must withstand the

11、 added PDdue to short circuit output test e.g., IO. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89526 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 1.4 Rec

12、ommended operating conditions - Continued. Minimum clock pulse duration (twCLK) 2/ . 12.5 ns Minimum setup time (tsu): 2/ Data inputs A H 6.0 ns Enable P (ENP ) when changing from load 0s to countdown for output (QH) . 23 ns Enable P (ENP ) when changing from load 0s to countdown for output (RCO ) 2

13、1 ns Enable P (ENP ) (all other conditions) or ENABLE T ( ENT ) 10 ns S0 or S1 (load) . 13 ns S0 or S1 (clear) 13 ns S0 or S1 (count down) 52 ns S0 or S1 (count up) 52 ns Minimum hold time at any input with respect ro CLK (th) 0.0 ns Operating temperature (TA) -55C to +125C 2. APPLICABLE DOCUMENTS 2

14、.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SP

15、ECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of St

16、andard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precede

17、nce. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. _ 2/ This setup time is required t

18、o ensure stable data. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89526 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements

19、. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has

20、been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modification

21、s to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2

22、Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall

23、be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Test circuit and switching waveforms. The test circuit and switching waveforms shall be as specified on figure 3. 3.3 Electrical performance characteristics. Unless otherwise specified herein, th

24、e electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described i

25、n table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations,

26、the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certif

27、ication mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of comp

28、liance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-

29、PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land a

30、nd Maritime s agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted wit

31、hout license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89526 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C 1/ unless otherwise specified Group A subgrou

32、ps Device type Limits Unit Min Max High level output voltage VOHVCC= 4.5 V, VIH= 2.0 V, VIL= 0.8 V IOH= -2.0 mA 2/ 1, 2, 3 All 2.5 V Low level output voltage VOL1VCC= 4.5 V, VIH= 2.0 V, 2/ Qn VIL= 0.8 V 1, 2, 3 All 0.5 V VOL 2IOL= 20 mA RCO VIL= 0.7 V 1, 2, 3 All 0.5 V Input clamp voltage VICVCC= 4.

33、5 V, IIN= -18 mA 1, 2, 3 All -1.2 V Low level input current IILVCC= 5.5 V, ENT 1, 2, 3 All -4.0 mA VIN= 0.4 V other inputs -2.0 High level input current IIH1VCC= 5.5 V, ENT 1, 2, 3 All 40 A VIN= 2.7 V other inputs 20 IIH2VCC= 5.5 V, VIN= 7.0 V 1, 2, 3 All 0.1 mA Output current IOVCC= 5.5 V, VOUT= 2.

34、25 V 3/ 1, 2, 3 All -30 -112 mA Supply current ICCVCC= 5.5 V 1, 2, 3 All 180 mA Functional tests See 4.3.1c 7, 8 All Maximum clock frequency fMAXVCC= 5.5 V, RL= 500, CL= 50 pF 4/ 9, 10, 11 All 40 MHz See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted

35、without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89526 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C 1/ unless otherwise specified

36、Group A subgroups Device type Limits Unit Min Max Propagation delay time, CLK to RCO tPLH1VCC= 4.5 V to 5.5 V 9, 10, 11 All 6.0 35 ns tPHL1 RL= 500 9, 10, 11 All 6.0 20 ns Propagation delay time, CLK to any Q tPLH2 CL= 50 pF see figure 3 5/ 9, 10, 11 All 3.0 12 ns tPHL2 9, 10, 11 All 4.0 16 ns Propa

37、gation delay time, ENT to RCO tPLH3 9, 10, 11 All 3.0 25 ns tPHL3 9, 10, 11 All 6.0 21 ns Propagation delay time, ENP to RCO tPLH4 9, 10, 11 All 5.0 27 ns tPHL4 9, 10, 11 All 6.0 21 ns 1/ Unused inputs that do not directly control the pin under test must be 2.5 V or 0.4 V. No unused inputs shall exc

38、eed 5.5 V or go less than 0.0 V. No inputs shall be floated. 2/ All outputs must be tested. In the case where only one input at VILmaximum or VIHminimum produces the proper output state, the test must be performed with each input being selected as the VILmaximum or VIHminimum input. 3/ The output co

39、nditions have been chosen to produce a current that closely approximates one-half of the true short circuit output current, IOS. Not more than one output will be tested at one time and the duration of the test condition shall not exceed one second. 4/ This parameter may be guaranteed if not tested.

40、5/ Propagation delay limits are based on single output switching. Unused inputs = 3.5 V or 0.3 V. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89526 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION

41、 LEVEL C SHEET 7 DSCC FORM 2234 APR 97 Device type 01 Case outlines K and L 3 Terminal number Terminal symbol 1 S0 NC 2 S1 S0 3 A S1 4 B A 5 C B 6 D C 7 E D 8 F NC 9 G E 10 H F 11 ENT G 12 GND H 13 RCO ENT 14 CLK GND 15 QH NC 16 QG RCO 17 QF CLK 18 QE QH 19 QD QG 20 QC QF 21 QB QE 22 QA NC 23 ENP QD

42、 24 VCCQC 25 - - - QB 26 - - - QA 27 - - - ENP 28 - - - VCCFIGURE 1. Terminal connections. Inputs Function ENP ENT S1 S0 X X L L Clear L L L H Count down X X H L Load L L H H Count up H = High voltage level L = Low voltage level X = Irrelevant FIGURE 2. Truth table. Provided by IHSNot for ResaleNo r

43、eproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89526 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97 NOTES: 1. CLincludes probe and jig capacitance. 2. All input pulses have the following chara

44、cteristics: PRR 10 MHz, duty cycle = 50%, tr= tf= 3 ns 1 ns. 3. The outputs are measured one at a time with one input transition per measurement. FIGURE 3. Test circuit and switching waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD

45、 MICROCIRCUIT DRAWING SIZE A 5962-89526 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 9 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall

46、 be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A or D. The test circuit shall be maintained by the manufac

47、turer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA

48、= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. TABLE II. Electrical test requirements. MIL-STD-883 test requirements Subgroups (in accordance with MIL-STD-883, method 5005, table I) Interim electrical parameters (method 5004) - - - Final electrical test parameters (method 5004) 1*, 2, 3, 7,

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