DLA SMD-5962-89537 REV C-2013 MICROCIRCUITS MEMORY DIGITAL 16K X 8 UV EPROM MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Updated boilerplate. Added device type 03. Moved endurance and data retention testing requirements from Section 4 of drawing to Section 3 of drawing. Converted case outline “Y“ to standard package. Editorial changes throughout. 94-03-31 M. A. Fry

2、e B Boilerplate update, part of 5 year review. ksr 06-02-10 Raymond Monnin C Update drawing to reflect current MIL-PRF-38535 requirements. glg 13-11-25 Charles Saffle THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. REV SHEET REV SHEET REV STATUS REV C C C C C C C C C C C C OF SHEETS SHEET

3、 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Kenneth Rice DLA LAND AND MARITIME STANDARD MICROCIRCUIT DRAWING CHECKED BY Ray Monnin COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY All DEPARTMENTS APPROVED BY D. R. Cool MICROCIRCUITS, MEMORY, DIGIT

4、AL, 16K X 8 UV EPROM, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 89-01-26 AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-89537 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E062-14 Provided by IHSNot for ResaleNo reproduction or networking permitted without

5、license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89537 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accorda

6、nce with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN shall be as shown in the following example: 5962-89537 01 X A | | | | | | | | | | | | Drawing number Device type Case outline Lead finish (see 1.2.1) (see 1.2.2) (see 1.2.3) 1.2.1 Device type(s). The device ty

7、pe(s) shall identify the circuit function as follows: Device type Generic number Circuit Access time 01 (see 6.6) 16K x 8-bit UV EPROM 65 ns 02 (see 6.6) 16K x 8-bit UV EPROM 55 ns 03 (see 6.6) 16K x 8-bit UV EPROM 45 ns 1.2.2 Case outline(s). The case outline(s) shall be as designated in MIL-STD-18

8、35, and as follows: Outline letter Descriptive designator Terminals Package style 1/ Y CDIP3-T28 or GDIP4-T28 28 Dual-in-line Z GDFP2-F28 28 Flat package U CQCC1-N32 32 Rectangular leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute max

9、imum ratings. Supply voltage range to ground potential (VCC) . -0.5 V dc to +7.0 V dc DC voltage range applied to the outputs in the high Z state -0.5 V dc to +7.0 V dc DC input voltage . -3.0 V dc to +7.0 V dc Maximum power dissipation 1.0 W 2/ Lead temperature (soldering, 10 seconds) +260C Thermal

10、 resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) . +175C Storage temperature range (TSTG) . -65C to +150C Temperature under bias -55C to +125C Data retention 10 years, minimum Endurance . 25 cycles/byte, minimum 1.4 Recommended operating conditions. Case operating temp

11、erature range (TC) . -55C to +125C Input high voltage range (VIH) +2.0 V dc Input low voltage range (VIL) +0.8 V dc Supply voltage range (VCC) . +4.5 V dc to +5.5 V dc 1/ Lid shall be transparent to permit ultraviolet light erasure. 2/ Must withstand the added PD due to short circuit test; e.g., IOS

12、. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89537 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, sta

13、ndards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Inte

14、grated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MI

15、L-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/quicksearch.dla.mil/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the t

16、ext of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements The individual item requirements shall be

17、 in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to

18、MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modific

19、ations shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified

20、 in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.3.1 Unprogramme

21、d devices. The truth table for unprogrammed devices for contracts involving no altered item drawing shall be as specified on figure 2. When testing is required per 4.3 herein, the devices shall be programmed by the manufacturer prior to test in a checkerboard pattern (a minimum of 50 percent of the

22、total number of bits programmed) or to any altered item drawing pattern which includes at least 25 percent of the total number of bits programmed. 3.2.3.2 Programmed devices. The truth table for programmed devices shall be specified by an altered item drawing. 3.3 Electrical performance characterist

23、ics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electric

24、al tests for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89537 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 3.5 Ma

25、rking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the opt

26、ion of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance w

27、ith MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Processing EPROMS. All testing requirements and quality assurance provisions herein shall be satisfied by the manufacturer prior to delivery. 3.6.1 Erasure of EPROMS. When specified, devices shall be erased in accordance with the pr

28、ocedures and characteristics specified in 4.4. 3.6.2 Programmability of EPROMS. When specified, devices shall be programmed to the specified pattern using the procedures and characteristics specified in 4.5. 3.6.3 Verification of state of EPROMS. When specified, devices shall be verified as either p

29、rogrammed to the specified pattern or erased. As a minimum, verification shall consist of performing a functional test (subgroup 7) to verify that all bits are in the proper state. Any bit that does not verify to be in the proper state shall constitute a device failure and shall be removed from the

30、lot. 3.7 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of

31、supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.8 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this

32、 drawing. 3.9 Notification of change. Notification of change to DLA Land and Maritime-VA shall be required for any change that affects this drawing. 3.10 Verification and review. DLA Land and Maritime, DLA Land and Maritimes agent and the acquiring activity retain the option to review the manufactur

33、ers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.11 Endurance. A reprogrammability test shall be completed as part of the vendors reliability monitors. This reprogrammability test shall be done for initial cha

34、racterization and after any design or process changes which may affect the reprogrammability of the device. The methods and procedures may be vendor specific, but shall guarantee the number of program/erase endurance cycles listed in section 1.3 herein over the full military temperature range. The v

35、endors procedure shall be kept under document control and shall be made available upon request of the acquiring or preparing activity, along with test data. 3.12 Data retention. A data retention stress test shall be completed as part of the vendors reliability monitors. This test shall be done for i

36、nitial characterization and after any design or process change which may affect data retention. The methods and procedures may be vendor specific, but shall guarantee the number of years listed in section 1.3 herein over the full military temperature range. The vendors procedure shall be kept under

37、document control and shall be made available upon request of the acquiring or preparing activity, along with test data. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89537 DLA LAND AND MARITIME COLUMBUS, OH

38、IO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TA +125C 4.5 V dc VCC 5.5 V dc unless otherwise specified Group A subgroups Device types Limits Unit Min Max Output low voltage VOLVIN= VIHor VIL, IOL= 16 mA,

39、VCC = 4.5 V 1, 2, 3 All 0.5 V Output high voltage VOHVIN= VIHor VIL, IOH= -4.0 mA, VCC = 4.5 V 1, 2, 3 All 2.4 Input high voltage 2/ VIH1, 2, 3 All 2.0 V Input low voltage 2/ VIL1, 2, 3 All 0.8 Input leakage current IIXVIN= GND to 5.5 V 1, 2, 3 All -10 +10 A Output leakage current IOZVCC= 5.5 V, IOU

40、T= 0 mA VOUT= GND and 5.5 V 1, 2, 3 All -40 +40 A Output short circuit current IOS3/ 4/ VCC= 5.5 V, VOUT=0.0 V 1, 2, 3 All -20 -90 mA Power supply current ICCVCC= 5.5 V, IOUT= 0 mA f = 16.7 MHz Inputs cycling from 0 to 3 V 1, 2, 3 All 120 mA Standby supply current ISBVCC= 5.5 V, IOUT= 0 mA VIN= 2.0

41、V 1, 2, 3 All 35 mA Input capacitance CIN4/ VIN= 0 V, VCC= 5.0 V f = 1 MHz, TA= +25C See 4.3.1c 4 All 10 pF Output capacitance COUT4/ VOUT= 0 V, VCC= 5.0 V f = 1 MHz, TA= +25C See 4.3.1c 4 All 10 pF Functional tests See 4.3.1e 7, 8A, 8B All Address to output valid tAASee figure 4 9, 10, 11 01 65 ns

42、02 55 03 45 Chip select active to output valid 5/ tACS19, 10, 11 01 35 ns 02 30 03 25 Chip select active to output valid 6/ tACS29, 10, 11 01 70 ns 02 60 03 50 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MI

43、CROCIRCUIT DRAWING SIZE A 5962-89537 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions 1/ -55C TA +125C 4.5 V dc VCC 5.5 V dc unless otherwise specified Group A subgroups

44、Device types Limits Unit Min Max Chip select active to power-up 4/ 6/ 7/ tPUSee figure 4 VCC= 4.5 V 9, 10, 11 All 0 ns Chip select inactive to power-down 4/ 6/ 7/ tPD9, 10, 11 01 70 ns 02 60 03 50 Chip select inactive to high-Z 4/ 5/ 7/ tHZCS19, 10, 11 01 35 ns 02 30 03 25 Chip select active to high

45、-Z 4/ 6/ 7/ tHZCS29, 10, 11 01 70 ns 02 60 03 50 1/ AC tests are performed with input rise and fall times of 5 ns or less, timing reference levels of 1.5 V, input pulse levels of 0 V to 3.0 V, and the output load in figure 3, circuit A. 2/ These are absolute values with respect to device ground and

46、all overshoots due to system or tester noise are included. 3/ For test purposes, not more than one output at a time may be shorted. Short circuit test duration should not exceed one second. 4/ Tested initially and after any design or process change which may affect that parameter, and therefore shal

47、l be guaranteed to the limits specified in table I. 5/ Parameter applies to CS2, CS3, and CS4. 6/ Parameter applies only to CS1. 7/ Transition is measured at steady-state high level -500 mV or steady-state low level +500 mV on the output from 1.5 V level on the input and the output load in figure 3,

48、 circuit B. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89537 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 Device types 01 - 03 Case outlines Y , Z U Terminal number Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 A9A8A7A6A5A4A3A2A1A0O0O1O2GND O