DLA SMD-5962-89552 REV C-2011 MICROCIRCUIT DIGITAL ADVANCED CMOS QUAD D-TYPE FLIP-FLOP MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add device class V criteria. Add RHA data. Editorial changes throughout. Jak 97-11-12 Monica L. Poelking B Update boilerplate to MIL-PRF-38535 requirements. LTG 08-06-26 Thomas M. Hess C Made technical change on sheet 8 table I Power dissipation

2、capacitance (CPD) maximum value. Update paragraph 4.4.1c and footnote 8/ in table I. - LTG 11-07-19 Thomas M. Hess REV SHET REV C C C C SHEET 15 16 17 18 REV STATUS REV C C C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Marcia B. Kelleher DLA LAND AND M

3、ARITIME COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY Ray Monnin APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, ADVANCED CMOS, QUAD D-TYPE FLIP-FLOP

4、, MONOLITHIC SILICON DRAWING APPROVAL DATE 89-03-07 REVISION LEVEL C SIZE A CAGE CODE 67268 5962-89552 SHEET 1 OF 18 DSCC FORM 2233 APR 97 5962-E442-11 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89552 DL

5、A LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lea

6、d finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following examples. For device classes M and Q: 5962 - 89552 01 E A Federal stock cla

7、ss designator RHA designator (see 1.2.1) Device type (see 1.2.2)Case outline (see 1.2.4)Lead finish (see 1.2.5) / /Drawing number For device class V: 5962 R 89552 01 V E A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4)

8、 Lead finish (see 1.2.5) / (see 1.2.3) /Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA le

9、vels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54AC175 Quad D-type flip-flop with master reset 1.2.3 Device class designa

10、tor. The device class designator is a single letter identifying the product assurance level as listed below. Since the device class designator has been added after the original issuance of this drawing, device classes M and Q designators will not be included in the PIN and will not be marked on the

11、device. Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 Provided by IHSNot for ResaleNo r

12、eproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89552 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:

13、 Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line F GDFP2-F16 or CDFP3-F16 16 Flat pack 2 CQCC1-N20 20 Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, a

14、ppendix A for device class M. 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) -0.5 V dc to +6.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC + 0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc DC input diode current . 20 mA DC output diode current (per outp

15、ut pin) 50 mA DC output source or sink current (per output pin) 50 mA DC VCCor GND current (per pin) . 100 mA Maximum power dissipation (PD) . 500 mW Storage temperature range (TSTG) . -65C to +150C Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) See MIL-STD-

16、1835 Junction temperature (TJ) +175C 4/ 1.4 Recommended operating conditions. 2/ 3/ 5/ Supply voltage range (VCC) 3.0 V dc to +5.5 V dc Input voltage range (VIN) +0.0 V dc to VCCOutput voltage range (VOUT) . +0.0 V dc to VCCMinimum high level input voltage (VIH): VCC= 3.0 V 2.10 V dc VCC= 4.5 V 3.15

17、 V dc VCC= 5.5 V 3.85 V dc Maximum low level input voltage (VIL): VCC= 3.0 V 0.90 V dc VCC= 4.5 V 1.35 V dc VCC= 5.5 V 1.65 V dc Case operating temperature range (TC) . -55C to +125C Input rise or fall times: VCC= 3.6 V to 5.5 V . 0 to 8 ns/V Minimum setup time, Dn to CP (ts): TC= +25C, VCC= 3.0 V .

18、 4.5 ns TC= +25C, VCC= 4.5 V . 3.0 ns TC= -55C and +125C, VCC= 3.0 V 5.0 ns TC= -55C and +125C, VCC= 4.5 V 3.5 ns 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless

19、 otherwise noted, all voltages are referenced to GND. 3/ The limits for the parameters specified herein shall apply over the full specified VCCrange and case temperature range of -55C to +125C. 4/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screenin

20、g conditions in accordance with method 5004 of MIL-STD-883. 5/ Operation from 2.0 V dc to 3.0 V dc is provided for compatibility with data retention and battery back-up systems. Data retention implies no input transition and no stored data loss with the following conditions: VIH 70% VCC, VIL 30% VCC

21、, VOH 70% VCC -20A, VOL 30% VCC 20 A. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89552 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 1.4 Recommended opera

22、ting conditions Continued. Minimum hold time, Dn to CP (th): TC= +25C, VCC= 3.0 V 2.0 ns TC= +25C, VCC = 4.5 V 2.5 ns TC= -55C and +125C, VCC= 3.0 V .2.0 ns TC= -55C and +125C, VCC= 4.5 V .2.5 ns Minimum pulse width CP (tw): TC= +25C, VCC= 3.0 V 5.0 ns TC= +25C, VCC = 4.5 V 5.0 ns TC= -55C and +125C

23、, VCC= 3.0 V .6.0 ns TC= -55C and +125C, VCC= 4.5 V .5.0 ns Minimum pulse width MR (tw): TC= +25C, VCC= 3.0 V 5.0 ns TC= +25C, VCC = 4.5 V 5.0 ns TC= -55C and +125C, VCC= 3.0 V .5.5 ns TC= -55C and +125C, VCC= 4.5 V .5.0 ns Minimum recovery time, MR to CP (trec): TC= +25C, VCC= 3.0 V 1.5 ns TC= +25C

24、, VCC = 4.5 V 1.5 ns TC= -55C and +125C, VCC= 3.0 V .1.5 ns TC= -55C and +125C, VCC= 4.5 V .1.5 ns Maximum frequency, CPn (fmax): TC= +25C, VCC= 3.0 V 95 MHz TC= +25C, VCC = 4.5 V 95 MHz TC= -55C and +125C, VCC= 3.0 V .95 MHz TC= -55C and +125C, VCC= 4.5 V .95 MHz 1.5 Radiation features. Maximum tot

25、al dose available (dose rate = 50 300 rads(Si)/s) 100k rads(Si) 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of

26、these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Elec

27、tronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order

28、Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89552 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 22

29、34 APR 97 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents cited in the solicitation or contract. JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEDEC Standard No. 17 -

30、A Standardized Description Test Procedure for Characterization of LATCH-UP in CMOS Devices. JEDEC Standard No. 20 - Standard for Description of 54/74ACXXXXX and 54/74ACTXXXXX Advanced High-Speed CMOS Devices. (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid

31、State Technology Association, 3103 North 10thStreet, Suite 240-S Arlington, VA 22201). 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applic

32、able laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management

33、(QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, a

34、nd physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein. 3.2.

35、2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and

36、test circuit shall be as specified on figure 4. 3.2.6 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing and acquiring activity upon request. 3.3 Electrical performance

37、characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The e

38、lectrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the e

39、ntire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking

40、for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, a

41、ppendix A. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89552 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 3.6 Certificate of compliance. For device classe

42、s Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source o

43、f supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and here

44、in or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits

45、 delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DLA Land and Maritime-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review f

46、or device class M. For device class M, DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3

47、.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 38 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWI

48、NG SIZE A 5962-89552 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test and MIL-STD-883 test method 1/ Symbol Test conditions 2/ 3/ -55C TC +125C +3.0 V VCC +5.5 V unless otherwise specified Device type and device class VCCGroup A subgroups Limits 4/ UnitMin Max Positive input clamp voltage 3022 VIC+5/ For input under test, IIN= 1.0 mA All V 0.0 V 1 0.4 1.5 V M, D, P, L, R All V 0.0 V 1 0.4 1.5 Negative input clamp voltage 3