DLA SMD-5962-89602 REV B-2006 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED SCHOTTKY TTL OCTAL BUFFERS AND DRIVERS WITH NONINVERTING THREE-STATE OUTPUTS MONOLITHIC SILICON《硅单片 装有三态输出放大器的驱动.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R204-92 92-05-11 Tim H. Noh B Update to current requirements. Editorial changes throughout. gap 06-06-09 Raymond Monnin The original first page of this drawing has been replaced. REV SHET REV SHET REV STATUS RE

2、V B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY Tim H. Noh DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Ray Monnin COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. F

3、rye MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED SCHOTTKY TTL, OCTAL BUFFERS AND DRIVERS WITH NONINVERTING THREE-STATE OUTPUTS, AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 89-05-05 MONOLITHIC SILICON AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-89602 SHEET 1 OF 10 DSCC FORM

4、2233 APR 97 5962-E335-06 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89602 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This

5、drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-89602 01 R X Drawing number Device type (see 1.2.1) Cas

6、e outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ALS541 Octal buffers and drivers with noninverting three-state outputs 1.2.2 Case outline(s). The case outline(s) are as desi

7、gnated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 dual-in-line S GDFP2-F20 or CDFP3-F20 20 flat 2 CQCC1-N20 20 square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absol

8、ute maximum ratings. Supply voltage range . -0.5 V dc to +7.0 V dc DC input voltage -1.2 V dc at -18 mA to +7.0 V dc Voltage applied to a disabled three-state output . +5.5 V dc Storage temperature . -65C to +150C Maximum power dissipation (PD) 1/ . 137.5 mW Lead temperature (soldering, 10 seconds)

9、+300C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) . +4.5 V dc minimum to +5.5 V dc maximum Minimum high level input voltage (VIH) 2.0 V Maximum low level input voltage (VIL): TC= 125C . 0.

10、7 V TC= -55C . 0.8 V TC= +25C . 0.8 V Case operating temperature range (TC) -55C to +125C _ 1/ Maximum power dissipation is defined as VCCx ICC, and must withstand the added PDdue to short circuit test, e.g., IO. Provided by IHSNot for ResaleNo reproduction or networking permitted without license fr

11、om IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89602 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing

12、 to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 -

13、 Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/as

14、sist.daps.dla.mil;quicksearch/ or www.dodssp.daps.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this

15、 drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class leve

16、l B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the

17、 manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These

18、modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as sp

19、ecified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Test c

20、ircuit and switching waveforms. The test circuits and switching waveforms shall be as specified on figure 3. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operat

21、ing temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-S

22、TANDARD MICROCIRCUIT DRAWING SIZE A 5962-89602 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition,

23、the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all

24、 non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be

25、required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535

26、, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required

27、for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 4.

28、VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The foll

29、owing additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The te

30、st circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electric

31、al parameter tests prior to burn-in are optional at the discretion of the manufacturer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89602 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION

32、LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Limits Test Symbol Conditions -55C TC +125C unless otherwise specified 1/ Group A subgroups Min Max Unit IOH= -0.4 mA 2.5 IOH= -3.0 mA 2.4 High level output voltage VOHVCC= 4.5 V VIH= 2.0 V VILat: +125C = 0.7 V -5

33、5C = 0.8 V +25C = 0.8 V 2/ IOH= -12 mA 1, 2, 3 2.0 V Low level output voltage VOLVCC= 4.5 V VIH= 2.0 V IOL= 12 mA 2/ VILat: +125C = 0.7 V -55C = 0.8 V +25C = 0.8 V 1, 2, 3 0.4 V Input clamp voltage VICVCC= 4.5 V, IIN= -18 mA 1, 2, 3 -1.2 V IIH1 VIN= 7.0 V 100 High level input current IIH2 VCC= 5.5 V

34、 VIN= 2.7 V 1, 2, 3 20 A Control inputs -0.2 Low level input current IIL VCC= 5.5 V VIN= 0.4 V Data inputs 1, 2, 3 -0.1 mA Output current IOVCC= 5.5 V, VOUT= 2.25 V 3/ 1, 2, 3 -20 -112 mA IOZHVOUT= 2.7 V 20 Off state output leakage current IOZLVCC= 5.5 V VOUT= 0.4 V 1, 2, 3 -20 A ICCHOutputs high 14

35、 ICCLOutputs low 25 Quiescent current ICCZVCC= 5.5 V Outputs disabled 1, 2, 3 22 mA Functional tests See 4.3.1c 4/ 7, 8 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89602 DEF

36、ENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. 1/ Limits Test Symbol Conditions -55C TC +125C Unless otherwise specified 1/ Group A subgroups Min Max Unit tPLH4 17 Propagation delay tim

37、e, A to Y tPHL9, 10, 11 2 14 ns tPZH5 18 Output enable time, G to Y tPZL9, 10, 11 8 28 ns tPHZ1 12 Output disable time, G to Y tPLZVCC= 4.5 V to VCC= 5.5 V CL= 50 pF R1= 500 R2= 500 See figure 3 9, 10, 11 2 14 ns 1/ Unused inputs that do not directly control the pin under test must be 2.5 V or 0.4 V

38、. No unused inputs shall exceed 5.5 V or go less than 0.0 V. No inputs shall be floated. 2/ All outputs must be tested. In the case where only one input at VILmaximum or VIHminimum produces the proper output state, the test must be performed with each input being selected as the VILmaximum or VIHmin

39、imum input. 3/ The output conditions have been chosen to produce a current that closely approximates one half of the true short circuit output current, IOS. Not more than one output will be tested at one time and the duration of the test condition shall not exceed one second. 4/ Functional tests sha

40、ll be conducted at input test conditions of GND VIL VOLand VOH VIH VCC. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A

41、inspection. a. Tests shall be as specified in table II herein. b. Subgroups 4, 5, and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroups 7 and 8 shall include verification of the truth table. 4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be as specif

42、ied in table II herein. b. Steady-state life test conditions, method 1005 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request.

43、The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. (2) TA= +125C, minimum. (3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. Provided by IHSNot for R

44、esaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89602 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 Case outlines R, S, and 2 Terminal number Terminal symbol 1 1G 2 A1 3 A2 4

45、 A3 5 A4 6 A5 7 A6 8 A7 9 A8 10 GND 11 Y8 12 Y7 13 Y6 14 Y5 15 Y4 16 Y3 17 Y2 18 Y1 19 2G 20 VCCFIGURE 1. Terminal connections. INPUTS OUTPUTS 1G 2G A Y H X X Z X H X ZL L H H L L L L H = High voltage level L = Low voltage level X = Irrelevant Z = High impedance state FIGURE 2. Truth table. Provided

46、 by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89602 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 See notes on the next page. FIGURE 3. Test circuit and swi

47、tching waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89602 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 9 DSCC FORM 2234 APR 97 NOTES: 1. CLincludes probe and j

48、ig capacitance. 2. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. 3. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. 4. When measuring propagation delay items of three-state outputs, switch S1 is open. 5. The outputs are measured one at a time with one input transition per measurement. FIGURE 3. Test circuit and switching waveforms - Continued. Provided