DLA SMD-5962-89611 REV C-2011 MICROCIRCUIT LINEAR DUAL OUTPUT DRIVER MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R123-93. 93-04-02 M. A. FRYE B Change to JAin 1.3, VATand Ittests in table I, and figure 2. Update boilerplate. -rrp 01-04-18 R. MONNIN C Correct pin out for case outline letter 2. Update to latest Boilerplate.

2、 Editorial changes throughout. - jt 11-03-04 C. SAFFLE THE ORGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED. REV SHEET REV SHEET REV STATUS REV C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 PMIC N/A PREPARED BY JOSEPH A. KERBY DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.dscc

3、.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY CHARLES E. BESORE APPROVED BY MICHAEL A. FRYE MICROCIRCUIT, LINEAR, DUAL OUTPUT DRIVER, MONOLITHIC SILICON DRAWING APPROVAL DATE 90-02-02 AMSC N/A REVISION

4、 LEVEL C SIZE A CAGE CODE 67268 5962-89611 SHEET 1 OF 9 DSCC FORM 2233 APR 97 5962-E268-11 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89611 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL

5、C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 596

6、2-89611 01 E X Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type. The device type identify the circuit function as follows: Device type Generic number Circuit function 01 UC1706 Dual output driver 1.2.2 Case outlines. The case outlines are as d

7、esignated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line 2 CQCC1-N20 20 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings.

8、Supply voltage (VIH) +40 V dc Collector supply voltage (VC) . +40 V dc Output current (each output, source or sink): Steady state . 500 mA Peak transient 1.0 A Capacitive discharge energy . 15 J Digital inputs +5.5 V dc Analog stop inputs . VINPower dissipation (PD): TA= +25C 1 W 2/ TA= +25C 1 W 3/

9、Storage temperature . -65C to +150C Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Thermal resistance, junction-to-ambient (JA): Case E . 100C/W Case 2 . 70C/W 1.4 Recommended operating conditions. Ambient operating temperature range (TA) -5

10、5C to +125C _ 1/ Unless otherwise specified, all voltages are referenced to the four ground pins, which must be connected to a common ground. All currents are positive into, negative out of, the specified terminal. 2/ Derate at 10 mW/C above TA= +50C. 3/ Derate at 16 mW/C above TC= +25C. Provided by

11、 IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89611 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and h

12、andbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circui

13、ts, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 -

14、Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the t

15、ext of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall b

16、e in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to

17、 MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifi

18、cations shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensi

19、ons. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections and truth table. The terminal connections and truth table shall be as specif

20、ied on figure 1. 3.2.3 Block diagram. The block diagram shall be as specified on figure 2. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full ambient operating temperature

21、 range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN

22、listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance i

23、ndicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. Provided by IHSNot for ResaleNo r

24、eproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89611 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TA +125C VIN= V

25、C= 20 V unless otherwise specified Group A subgroups Device type Limits Unit Min Max VINsupply current ICC(IN)VIN= 40 V 1,2,3 01 10 mA VCsupply current ICC(C)VC= 40 V, outputs low 1,2,3 01 5 mA VCleakage current ICLVIO= 0 V, VC= 30 V 1,2,3 01 0.1 mA Digital input low level voltage VIL1,2,3 01 0.8 V

26、Digital input high level voltage VIH1,2,3 01 2.2 V Input current IIVI= 0 V 1,2,3 01 -1.0 mA Input leakage current IILVI= 5 V 1,2,3 01 0.1 mA Output high saturation voltage (VC VO) VCO(SAT)IO= -50 mA 1,2,3 01 2.0 V IO= -500 mA 2.5 Output low saturation voltage VO(SAT)IO= 50 mA 1,2,3 01 0.4 V IO= 500

27、mA 2.5 Inhibit threshold voltage VTHVREF= 0.5 V 1,2,3 01 0.4 0.6 V VREF= 3.5 V 3.3 3.7 Inhibit input current IIIVREF= 0 V 1,2,3 01 -20 A Analog threshold voltage VATVCM= 0 V to 15 V 1,2,3 01 80 170 mV Input bias current IIBVCM= 0 V 1,2,3 01 -20 A Rise time delay 1/ tr(delay) CL= open, INVERTING INPU

28、T TO OUTPUT 9,10,11 01 220 ns CL= open, NONINVERTING INPUT TO OUTPUT 215 Fall time delay 1/ tf(delay) CL= open, INVERTING INPUT TO OUTPUT 9,10,11 01 90 ns CL= open, NONINVERTING INPUT TO OUTPUT 150 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted wi

29、thout license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89611 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions -55C TA +125C VIN= VC= 20 V unless otherwise spe

30、cified Group A subgroups Device type Limits Unit Min Max Rise time trINVERTING INPUT TO OUTPUT, CL= 2.2 nF 9,10,11 01 95 ns NONINVERTING INPUT TO OUTPUT, CL= 2.2 nF 95 Fall time tfINVERTING INPUT TO OUTPUT, CL= 2.2 nF 9,10,11 01 90 ns NONINVERTING INPUT TO OUTPUT, CL= 2.2 nF 90 VC cross conduction c

31、urrent spike duration 2/ ItOUTPUT rising 9,10,11 01 25 ns OUTPUT falling 0 Analog shutdown delay time tshut(A)ANALOG STOP (-) REF = 0 V ANALOG STOP (+) input = 0 V to 0.5 V 9,10,11 01 250 ns Inhibit delay time tINHINHIBIT REF = 1 V, INHIBIT input under test = 0.5 V to 1.5 V, remaining input = 0.2 V

32、9,10,11 01 315 ns Functional test See 4.3.1c 7,8 1/ Delay is measured to 10 percent output change. 2/ Guaranteed if not tested to the limits specified. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supp

33、ly in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of c

34、onformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.

35、9 Verification and review. DLA Land and Maritime, DLA Land and Maritime s agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by

36、IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89611 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 Device type 01 Case outline E 2 Terminal number Terminal symbol 1 B INH

37、IBIT N/C 2 INVERTING INPUT B INHIBIT 3 NONINVERTING INPUT INVERTING INPUT 4 GROUND NONINVERTING INPUT 5 GROUND GROUND 6 A OUTPUT N/C 7 FLIP/FLOP GROUND 8 VCA OUTPUT 9 ANALOG STOP (-) FLIP/FLOP 10 ANALOG STOP (+) VC11 B OUTPUT N/C 12 GROUND ANALOG STOP (-) 13 GROUND ANALOG STOP (+) 14 VINB OUTPUT 15

38、INHIBIT REFERENCE GROUND 16 A INHIBIT N/C 17 - GROUND 18 - VIN19 - INHIBIT REFERENCE 20 - A INHIBIT N/C = No connect Truth Table Inverting Noninverting Out H H L L H H H L L L L L FIGURE 1. Terminal connections and truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted wit

39、hout license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89611 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 FIGURE 2. Block diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD

40、 MICROCIRCUIT DRAWING SIZE A 5962-89611 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall

41、 be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C or D. The test circuit shall be maintained by the m

42、anufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883.

43、(2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. TABLE II. Electrical test requirements. MIL-STD-883 test requirements Subgr

44、oups (in accordance with MIL-STD-883, method 5005, table I) Interim electrical parameters (method 5004) 1 Final electrical test parameters (method 5004) 1*, 2, 3, 9 Group A test requirements (method 5005) 1, 2, 3, 7, 8, 9, 10, 11 Groups C and D end-point electrical parameters (method 5005) 1, 2, 3 *

45、 PDA applies to subgroup 1. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified i

46、n table II herein. b. Subgroups 4, 5, and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroups 7 and 8 shall include verification of the truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZ

47、E A 5962-89611 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 9 DSCC FORM 2234 APR 97 4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be as specified in table II herein. b. Steady-state life test conditions, method 1005 of MIL-STD-883. (1) Test cond

48、ition A, B, C or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. (2) TA= +125C, minimum. (3) Test duration: 1,000 hours, except as permitted by method