DLA SMD-5962-89658 REV B-2012 MICROCIRCUIT DIGITAL ADVANCED CMOS OCTAL D-TYPE FLIP-FLOP WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add logic diagram as shown in figure 3. Redraw switching waveforms and test circuit as shown in figure 4. Update the boilerplate to current requirements as specified in MIL-PRF-38535. Editorial changes throughout. jak 06-05-02 Thomas M. Hess B Up

2、date the boilerplate to current requirements as specified in MIL-PRF-38535. Editorial changes throughout. jak 12-04-10 Thomas M. Hess REV SHEET REV SHEET REV STATUS REV B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Larry T. Gauder DLA LAND AND MARITIME COLUM

3、BUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Thomas J. Ricciuti THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, ADVANCED CMOS, OCTAL D-TYPE FLIP-FLOP WITH THREE-STATE OUTPUTS, TTL COMPATIBLE IN

4、PUTS, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 90-03-05 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-89658 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E221-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS

5、-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89658 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF

6、-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-89658 01 L A Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows

7、: Device type Generic number Circuit function 01 54ACT534 Octal D-type flip-flop with three-state outputs, TTL compatible inputs 02 54ACT11534 Octal D-type flip-flop with three-state outputs, TTL compatible inputs 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as fo

8、llows: Outline letter Descriptive designator Terminals Package style L GDIP3-T24 or CDIP4-T24 24 Dual-in-line R GDIP1-T20 or CDIP2-T20 20 Dual-in-line S GDFP2-F20 or CDFP3-F20 20 Flat pack 2 CQCC1-N20 20 Square leadless chip carrier 3 CQCC1-N28 28 Square leadless chip carrier 1.2.3 Lead finish. The

9、lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) . -0.5 V dc to +6.0 V dc DC input voltage range (VIN) . -0.5 V dc to VCC + 0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc Input clamp diode current (IIK) . 20 m

10、A Output clamp diode current (IOK) . 50 mA DC VCCor GND current (per pin) (ICC, IGND) 100 mA Storage temperature range (TSTG) -65C to +150C Maximum power dissipation (PD) . 500 mW Lead temperature (soldering, 10 seconds) . +300C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction tem

11、perature (TJ) +175C 2/ 1.4 Recommended operating conditions. 1/ Supply voltage range (VCC) . +4.5 V dc to +5.5 V dc Input voltage range (VIN) . 0.0 V dc to VCCOutput voltage range (VOUT) 0.0 V dc to VCCCase operating temperature range (TC) -55C to +125C Input rise or fall time (trand tf): VCC= 4.5 V

12、 and 5.5 V . 8 ns/V 1/ Unless other wise specified, all voltages are referenced to ground. 2/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. Provided by IHSNot for ResaleNo reproductio

13、n or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89658 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions - Continued. Minimum setup time, Dn to CP (ts): Device type 01: T

14、C= +25C, VCC= 4.5 V . 4.5 ns TC= -55C to +125C, VCC= 4.5 V . 5.0 ns Device type 02: TC= +25C, VCC= 4.5 V . 3.0 ns TC= -55C to +125C, VCC= 4.5 V . 3.0 ns Minimum hold time, Dn to CP (th): Device type 01: TC= +25C, VCC= 4.5 V . 2.5 ns TC= -55C to +125C, VCC= 4.5 V . 3.0 ns Device type 02: TC= +25C, VC

15、C= 4.5 V . 5.5 ns TC= -55C to +125C, VCC= 4.5 V . 5.5 ns Minimum pulse width, CP (tw): Device type 01: TC= +25C, VCC= 4.5 V . 5.0 ns TC= -55C to +125C, VCC= 4.5 V . 5.0 ns Device type 02: TC= +25C, VCC= 4.5 V . 9.0 ns TC= -55C to +125C, VCC= 4.5 V . 9.0 ns Maximum clock frequency (fMAX): Device type

16、 01: TC= +25C, VCC= 4.5 V . 95 MHz TC= -55C to +125C, VCC= 4.5 V . 85 MHz Device type 02: TC= +25C, VCC= 4.5 V . 55 MHz TC= -55C to +125C, VCC= 4.5 V . 55 MHz 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a

17、part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STA

18、NDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are availabl

19、e online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this d

20、rawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89658 DLA

21、LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this dr

22、awing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity

23、approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A

24、 “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case o

25、utlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3.

26、 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full

27、 case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part sh

28、all be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/comp

29、liance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Ce

30、rtificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply shal

31、l affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3

32、.8 Notification of change. Notification of change to DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritime s agent, and the acquiring activity retain the option to review the manufacturers facil

33、ity and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89658 DLA LAND AND MARITIME COL

34、UMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C unless otherwise specified VCCDevice type Group A subgroups Limits Unit Min Max High level output voltage VOH1/ VIN= VIH = 2.0 V or VIL= 0.8 V I

35、OH= -50 A 4.5 V All 1, 2, 3 4.4 V 5.5 V 5.4 VIN= VIH = 2.0 V or VIL= 0.8 V IOH= -24 mA 4.5 V 3.7 V 5.5 V 4.7 VIN= VIH = 2.0 V or VIL= 0.8 V IOH= -50 mA 5.5 V 3.85 V Low level output voltage VOL1/ VIN= VIH = 2.0 V or VIL= 0.8 V IOL= +50 A 4.5 V All 1, 2, 3 0.1 V 5.5 V 0.1 VIN= VIH = 2.0 V or VIL= 0.8

36、 V IOL= +24 mA 4.5 V 0.5 V 5.5 V 0.5 VIN= VIH = 2.0 V or VIL= 0.8 V IOL= +50 mA 5.5 V 1.65 V High level input voltage VIH2/ 4.5 V All 1, 2, 3 2.0 V 5.5 V 2.0 Low level input voltage VIL2/ 4.5 V All 1, 2, 3 0.8 V 5.5 V 0.8 Input leakage current IILVIN= 0.0 V 5.5 V All 1, 2, 3 -1.0 A IIHVIN= 5.5 V 1,

37、2, 3 1.0 Additional quiescent supply current, TTL input levels ICCAny one input, VIN= 3.4 V Other inputs, VIN= VCCor GND 5.5 V All 1, 2, 3 1.6 mA Quiescent supply current ICCHVIN= VCCor GND 5.5 V All 1, 2, 3 160 A ICCL160 ICCZ160 Three-state output leakage current IOZHVIN= 2.0 V or 0.8 V VOUT= VCCor

38、 GND 5.5 V All 1, 2, 3 10.0 A IOZL1, 2, 3 -10.0 Input capacitance CINSee 4.3.1c, TC= +25C All 4 8.0 pF Power dissipation capacitance CPD3/ See 4.3.1c, TC= +25C 01 4 50 pF 02 115 Functional tests See 4.3.1d 4.5 V and 5.5 V All 7, 8 See footnotes at end of table. Provided by IHSNot for ResaleNo reprod

39、uction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89658 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions -55C TC +125C u

40、nless otherwise specified VCCDevice type Group A subgroups Limits Unit Min Max Propagation delay time, CP to QntPHL4/ RL= 500 CL= 50 pF See figure 4 4.5 V 01 9 1.0 10.5 ns 10, 11 1.0 13.0 4.5 V 02 9 1.5 13.3 ns 10, 11 1.5 16.3 tPLH4/ 4.5 V 01 9 1.0 11.5 ns 10, 11 1.0 14.0 4.5 V 02 9 1.5 12.7 ns 10,

41、11 1.5 15.7 Propagation delay time, output enable, OEto QntPZH4/ RL= 500 CL= 50 pF See figure 4 4.5 V 01 9 1.0 12.0 ns 10, 11 1.0 14.0 4.5 V 02 9 1.5 12.0 ns 10, 11 1.5 14.2 tPZL4/ 4.5 V 01 9 1.0 11.0 ns 10, 11 1.0 13.0 4.5 V 02 9 1.5 12.2 ns 10, 11 1.5 14.5 Propagation delay time, output disable, O

42、Eto QntPHZ4/ RL= 500 CL= 50 pF See figure 4 4.5 V 01 9 1.0 12.5 ns 10, 11 1.0 14.5 4.5 V 02 9 1.5 12.9 ns 10, 11 1.5 13.9 tPLZ4/ 4.5 V 01 9 1.0 10.5 ns 10, 11 1.0 11.5 4.5 V 02 9 1.5 11.2 ns 10, 11 1.5 12.5 1/ The VOHand vOLtests will be tested at VCC= 4.5 V. VCC= 5.5 V will be guaranteed, if not te

43、sted, to the limits in table I. Limits shown apply to operation at VCC= 5.0 V 0.5 V. Transmission driving tests are performed at VCC= 5.5 V with a 2 ms duration maximum. 2/ The VIHand VILtests are not required, and shall be used as forcing functions for the VOHand VOLtests. 3/ Power dissipation capa

44、citance (CPD) determines the dynamic power consumption (PD) and the dynamic current consumption (IS) where: PD= (CPD+ CL)VCC2f + (VCCx ICC) + (n x d x ICCx VCC) IS= (CPD+ CL)VCCf + ICC+ (n x d x ICC) f is the frequency of the input signal; n is the number of device inputs at TTL levels; d is duty cy

45、cle of the input signal; and CLis the external output load capacitance. 4/ AC limits at VCC= 5.5 V are equal to limits at VCC= 4.5 V and guaranteed by testing at VCC= 4.5 V. Minimum ac limits are guaranteed for VCC= 5.5 V by guardbanding VCC= 4.5 V limits to 1.5 ns minimum. Provided by IHSNot for Re

46、saleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89658 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 Device types 01 02 Case outlines R, S, and 2 L 3 Terminal number Terminal symbol 1 2

47、 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 OEQ0D0 D1 Q1Q2 D2 D3 Q3GND CP Q4D4 D5 Q5Q6D6 D7 Q7VCC- - - - - - - - - - - - - - - - - - - - - - - - Q0Q1Q2Q3GND GND GND GND Q4Q5Q6Q7CP D7 D6 D5 D4 VCCVCCD3 D2 D1 D0 OE- - - - - - - - - - - - NC VCCD3 D2 D1 D0 OENC Q0Q1Q2Q3GND G

48、ND NC GND GND Q4Q5Q6Q7NC CP D7 D6 D5 D4 VCCNC = No connection FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89658 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 Inputs Outputs Dn CP OEQnH L L L L