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本文(DLA SMD-5962-89671 REV B-2002 MICROCIRCUIT LINEAR DUAL 12-BIT BUFFERED MULTIPLYING CMOS D A CONVERTER MONOLITHIC SILICON《硅单片 双重12位缓冲多路复用氧化物半导体直流 交流转变器 线性微型电路》.pdf)为本站会员(brainfellow396)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-89671 REV B-2002 MICROCIRCUIT LINEAR DUAL 12-BIT BUFFERED MULTIPLYING CMOS D A CONVERTER MONOLITHIC SILICON《硅单片 双重12位缓冲多路复用氧化物半导体直流 交流转变器 线性微型电路》.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add a C-4 package. Make changes to 1.2.2, 6.6, and figure 1. 90-04-11 M. L. POELKING B Drawing updated to reflect current requirements. - ro 02-11-05 R. MONNIN THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED. REV SHET REV SHET REV STAT

2、US REV B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY RICK C. OFFICER DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY CHARLES E. BESORE COLUMBUS, OHIO 43216 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AP

3、PROVED BY MONICA L. POELKING MICROCIRCUIT, LINEAR, DUAL 12-BIT BUFFERED MULTIPLYING CMOS D/A AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 89-10-31 CONVERTER, MONOLITHIC SILICON AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-89671 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E04

4、2-03 DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89671 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LE

5、VEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example:

6、 5962-89671 01 L X Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 DAC8221A Dual 12-bit buffered multiplying CMOS D/A converter 1.

7、2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style L GDIP3-T24 or CDIP4-T24 24 Dual-in-line 3 CQCC1-N28 28 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-

8、38535, appendix A. 1.3 Absolute maximum ratings. VDDto AGND . 0 V, +17 V VDDto DGND . 0 V, +17 V AGND to DGND -0.3 V, VDD+0.3 V Digital input voltage to DGND -0.3 V, VDD+0.3 V IOUTA, IOUTBto AGND . -0.3 V, VDD+0.3 V VREFA, VREFBto AGND 25 V VRFBA, VRFBBto AGND 25 V Power dissipation (PD) to +75C 500

9、 mW 1/ Storage temperature (soldering, 60 seconds) +300C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Thermal resistance, junction-to-ambient (JA): Case L 150C/W Case 3 110C/W _ 1/ Derate above 75C at 6.6 mW/C. Provided by IHSNot for ResaleNo reproduction or networking permitted withou

10、t license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89671 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. VREF. +10 V VOUTAand VOUTB. 0 V VDD+5 V or +15 V Ambient operating temperature range (T

11、A) -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the issue o

12、f the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solicitation. SPECIFICATION DEPARTMENT OF DEFENSE MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. STANDARDS DEPARTMENT OF DEFENSE MIL-STD-883 - Test Method S

13、tandard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. HANDBOOKS DEPARTMENT OF DEFENSE MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Unless otherwise indicated, copies of the specification, standards, and

14、handbooks are available from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothin

15、g in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified here

16、in. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program p

17、lan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect th

18、e PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89671 DE

19、FENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outl

20、ines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Functional diagram. The functional diagram shall be as specified on figure 3. 3.3 Electri

21、cal performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups spec

22、ified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked as listed in MIL-HDBK-103

23、(see 6.6 herein). For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built i

24、n compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufact

25、urer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the req

26、uirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required in accordance with MIL-P

27、RF-38535, appendix A. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for

28、ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89671 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1

29、/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max Relative accuracy INL 1,2,3 01 1/2 LSB Differential nonlinearity DNL 1,2,3 01 1 LSB Gain error GFSE1,2,3 01 1 LSB DC power supply 2/ rejection, Gain / VDDPSRR 1,2,3 01 .002 %/% Output leakage 3/ current, IOU

30、TA, IOUTBILKG1 01 10 nA 2,3 50 Input resistance RIN1,2,3 01 8 15 k Input resistance match RREF/ REF 1,2,3 01 1.0 % Digital input high VIHVDD= +5 V 1,2,3 01 2.4 V VDD= +15 V 13.5 Digital input low VILVDD= +5 V 1,2,3 01 0.8 V VDD= +15 V 1.5 Input current IINVIN= 0 V or VDDand 1 01 1.0 A VILor VIH2,3 1

31、0.0 Supply current IDDDigital inputs VILor VIH1,2,3 01 2.0 mA Digital inputs 0 V or VDD0.1 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89671 DEFENSE SUPPLY CENTER COLUMBUS C

32、OLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions 1/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max Input capacitance CINMeasuring at DB0 DB11pins, see

33、4.3.1c 4 01 10 pF Measuring at WR , CS , ADAC / DAC B pins, see 4.3.1c 15 Functional tests See 4.3.1d 7,8 01 Chip select to write 4/ set-up time tCSVDD= +5 V 9 01 130 ns VDD= +15 V 70 VDD= +5 V 10,11 5/ 160 VDD= +15 V 70 Chip select to write 4/ hold time tCH9,10,11 5/ 01 0 ns DAC select to write 4/

34、set-up time tASVDD= +5 V 9 01 120 ns VDD= +15 V 70 VDD= +5 V 10,11 5/ 160 VDD= +15 V 70 DAC select to write 4/ hold time tAH9,10,11 5/ 01 0 ns Data valid to write 4/ set-up time tDSVDD= +5 V 9 01 190 ns VDD= +15 V 90 VDD= +5 V 10,11 5/ 220 VDD= +15 V 90 See footnotes at end of table. Provided by IHS

35、Not for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89671 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test S

36、ymbol Conditions 1/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max Data valid to write 4/ hold time tDHVDD= +5 V 9,10,11 5/ 01 0 ns VDD= +15 V 10 Write pulse width 4/ tWRVDD= +5 V 9 01 140 ns VDD= +15 V 90 VDD= +5 V 10,11 5/ 170 VDD= +15 V 90 1/ Unless oth

37、erwise specified, VOUTA= VOUTB= 0 V, VDD= +5 V or +15 V, VREF= 10 V. 2/ VDD= 5 %. 3/ DAC loaded with 000 000 000 000. 4/ See figure 4. 5/ Subgroups 10 and 11, if not tested shall be guaranteed to the limits specified in table I herein. Provided by IHSNot for ResaleNo reproduction or networking permi

38、tted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89671 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 Device type 01 Case outlines L 3 Terminal number Terminal symbol 1 AGND NC 2 IOUTAAGND 3 RFBAIOUTA4 VREFARFBA5 DGN

39、D VREFA6 DB11(MSB) DGND 7 DB10DB11(MSB) 8 DB9NC 9 DB8 B1010 DB7DB911 DB6DB812 DB5 B713 DB4 B614 DB3DB515 DB2NC 16 DB1 B417 DB0(LSB) DB318 ADAC / DACB DB2 19 CS DB1 20 WR DB0 (LSB) 21 VDDADAC / DACB 22 VREFBNC 23 RFBBCS 24 IOUTBWR 25 - VDD26 - VREFB27 - RFBB28 - IOUTBNC = No connection FIGURE 1. Term

40、inal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89671 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 9 DSCC FORM 2234 APR 97 ADAC / DAC B CS WR DAC A DAC B L

41、 L L WRITE HOLD H L L HOLD WRITE X H X HOLD HOLD X X H HOLD HOLDL = Low state H = High state X = Dont care FIGURE 2. Truth table. FIGURE 3. Functional diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-

42、89671 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 10 DSCC FORM 2234 APR 97 Write cycle NOTES: 1. All input signal rise and fall times measured from 10 percent to 90 percent of VDD. VDD= +5 V, tr= tf= 20 ns; VDD= +15 V, tr= tf= 40 ns. 2. Timing measurement referenc

43、e level is ( VIH+ VIL) / 2. FIGURE 4. Timing waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89671 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 11 DSCC FORM 2234

44、APR 97 4. QUALITY ASSURANCE PROVISIONS 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality confor

45、mance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring act

46、ivity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II

47、herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following

48、additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 5 and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroup 4 (CINmeasurement) shall be measured only for the initial test and after process or design changes which may affect input capacitance. d. Subgroups 7 and 8 shall include verification of the truth table. 4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be as spe

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