DLA SMD-5962-89708 REV B-2011 MICROCIRCUIT DIGITAL HIGH SPEED CMOS QUAD 2-INPUT MULTIPLEXER WITH THREE-STATE INVERTING OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add logic diagram. Redraw, correct, and add notes to figure 4, switching waveforms and test circuit. Update the boilerplate to current requirements as specified in MIL-PRF-38535. Editorial changes throughout jak. 05-10-03 Thomas M. Hess B Update

2、test condition VOHand VOLin table I. Update boilerplate paragraphs to current requirements as specified in MIL-PRF-38535. - MAA. 11-11-10 Thomas M. Hess REV SHEET REV SHEET REV STATUS REV B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY Larry T. Gauder DLA LAND AND MARIT

3、IME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Monica L. Poelking THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY William K. Heckman MICROCIRCUIT, DIGITAL, HIGH SPEED CMOS, QUAD 2-INPUT MULTIPLEXER WITH THREE-STATE INVERTING

4、OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 89-08-28 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-89708 SHEET 1 OF 10 DSCC FORM 2233 APR 97 5962-E506-11 Provided by IHSNot for ResaleNo reproduction or networking permitte

5、d without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89708 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits

6、in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-89708 01 E A Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the c

7、ircuit function as follows: Device type Generic number Circuit function 01 54HCT258 Quad 2-input multiplexer with three-state inverting outputs, TTL compatible inputs 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Te

8、rminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC + 0.5 V dc DC output voltag

9、e range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc Clamp diode current (IIK, IOK) . 20 mA DC output current (per pin) (IOUT) . 35 mA DC VCCor GND current (per pin) (ICC, IGND) . 70 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD) 2/ . 500 mW Lead temperature (soldering, 10

10、 seconds) +260C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Input voltage range (VIN) +0.0 V dc to VCCOutput voltage range (VOUT). +0.0 V dc to VCCCase operating t

11、emperature range (TC) . -55C to +125C Input rise or fall time (tr, tf): VCC= 4.5 V . 0 to 500 ns 1/ Unless other wise specified, all voltages are referenced to ground. 2/ For TC= +100C to +125C, derate linearly at 12 mW/C. Provided by IHSNot for ResaleNo reproduction or networking permitted without

12、license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89708 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks fo

13、rm a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENS

14、E STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are ava

15、ilable online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of t

16、his drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class l

17、evel B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with

18、the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. The

19、se modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as

20、 specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic

21、 diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCU

22、IT DRAWING SIZE A 5962-89708 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the f

23、ull case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part

24、 shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/c

25、ompliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6

26、 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply s

27、hall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing

28、. 3.8 Notification of change. Notification of change to DLA Land and Maritime-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers faci

29、lity and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89708 DLA LAND AND MARITIME CO

30、LUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TC +125C unless otherwise specified VCCGroup A subgroups Limits Unit Min Max High level output voltage VOHVIN= VIH=2.0 V or VIL= 0.8 V IOH= -20 A 4.5

31、 V 1, 2, 3 4.4 V IOH= -6 mA 3.7 Low level output voltage VOLVIN= VIH=2.0 V or VIL= 0.8 V IOL= +20 A 4.5 V 1, 2, 3 0.1 V IOL= +6 mA 0.4 High level input voltage VIH2/ 4.5 V 1, 2, 3 2.0 V Low level input voltage VIL2/ 4.5 V 1, 2, 3 0.8 V Input capacitance CINVIN= 0 V, see 4.3.1c, TC= +25C 4 10 pF Outp

32、ut capacitance COUTSee 4.3.1c, TC= +25C 4 20 pF Quiescent supply current ICCVIN= VCCor GND, IOUT= 0.0 A 5.5 V 1, 2, 3 160 A Input leakage current IINVIN= VCCor GND 5.5 V 1, 2, 3 1.0 A Three-state output leakage current IOZVIN= 2.0 V or 0.8 V VOUT= VCCor GND 5.5 V 1, 2, 3 10 A Additional quiescent su

33、pply current, TTL input levels ICCAny one input, VIN = 2.4 V Other inputs, VIN= VCCor GND IOUT= 0.0 A 5.5 V 1, 2, 3 3.0 mA Functional tests See 4.3.1d 7, 8 Propagation delay time, An, Bn to Yn tPHL1, tPLH1CL= 50 pF See figure 4 4.5 V 9 27 ns 10, 11 41 Propagation delay time, S to Yn tPHL2, tPLH24.5

34、V 9 34 ns 10, 11 51 Propagation delay time, output disable, OEto Yn tPLZ, tPHZ4.5 V 9 30 ns 10, 11 45 Propagation delay time, output enable, OE to Yn tPZL, tPZH4.5 V 9 28 ns 10, 11 42 Output transition time tTLH, tTHL3/ 4.5 V 9 12 ns 10, 11 18 1/ For power supply of 5 V 10 percent, the worst case ou

35、tput voltages (VOHand VOL) occur for HCT at 4.5 V. Thus, the 4.5 V values should be used when designing with this supply. Worst cases VIHand VILoccur at VCC= 5.5 V and 4.5 V, respectively. 2/ VIHand VILtests are not required and shall be applied as forcing functions for VOHor VOLtests. 3/ Transition

36、 times (tTLH, tTHL), if not tested, shall be guaranteed to the specified limits in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89708 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL

37、 B SHEET 6 DSCC FORM 2234 APR 97 Device type 01 Case outline E Terminal number Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 S A1 B1 Y1 A2 B2 Y2 GD Y3 B3 A3 Y4 B4 A4 OEVCCFIGURE 1. Terminal connections. Inputs Ouputs OES An Bn Yn H X X X Z L L L X H L L H X L L H X L H L H X H L L = Low vol

38、tage level H = High voltage level X = Irrelevant Z = High impedance state FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89708 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION

39、LEVEL B SHEET 7 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89708 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR

40、 97 NOTES: 1. When measuring tPLH, tPHL, tTLH, and tTHL: S1 = Open; S2 = Open. When measuring tPZHand tPHZ: S1 = Open; S2 = Closed. When measuring tPZLand tPLZ: S1 = Closed; S2 = Open. 2. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the out

41、put control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. 3. CL= 50 pF or equivalent, includes test jig and probe capacitance. 4. RL= 1.0 k or equivalent. 5. Input signal from pulse generator: VIN= 0.0 V to 3.0 V; PRR 1

42、 MHz; ZO= 50; tr= 6.0 ns; tf= 6.0 ns; trand tfshall be measured from 0.3 V to 2.7 V and from 2.7 V to 0.3 V, respectively; duty cycle = 50 percent. 6. The outputs are measured one at a time with one transition per measurement. FIGURE 4. Switching waveforms and test circuit. Provided by IHSNot for Re

43、saleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89708 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 9 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shal

44、l be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-88

45、3. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as a

46、pplicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufac

47、turer. TABLE II. Electrical test requirements. MIL-STD-883 test requirements Subgroups (in accordance with MIL-STD-883, method 5005, table I) Interim electrical parameters (method 5004) - - - Final electrical test parameters (method 5004) 1*, 2, 3, 7, 8, 9 Group A test requirements (method 5005) 1,

48、2, 3, 4, 7, 8, 9, 10*, 11* Groups C and D end-point electrical parameters (method 5005) 1, 2, 3 * PDA applies to subgroup 1. * Subgroups 10 and 11, if not tested, shall be guaranteed to the specified limits in table I. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table