DLA SMD-5962-89725 REV A-1995 MIRCOCIRCUIT DIGITAL CMOS ASYNCHRONOUS SERIAL CONTROLLER MONOLITHIC SILICON《硅单片 同步串联控制器 氧化物半导体数字微型电路》.pdf

1、(YR-MO- DA 1 LTR DEscRIFTiau A pdd device type 02. Add package outline 3. 95-03-29 Editorial changes throughout. APFKwHl T. Hess STANIARD DRPUIYLPIJG MICRCIR(XT1T THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS I A SHEET 1 OF 16 CHECKED BY Robert M. Heber MICROCIRCUIT, DIGITAL, CMOS, ASYNCHRONO

2、US, SERIAL CONTROLLER, MONOLITHIC SILICON APPROVED BY William K. Heckrnan IESC FORM 193 JUL 94 DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited. 19 September 1990 SIZE A CPGEOCDE 67268 REVISION LEVEL AMSC NIA 5962-E155-95 5962-89725 Provided by IHSNot for ResaleNo rep

3、roduction or networking permitted without license from IHS-,-,-1. SCOPE 1.1 Scope. This drawing describes device requirements for class 6 microcircuits in accordance with 1.2.1 of MIL-STD-883, Ilprovisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices“. 1.2 Part or Identif

4、ying Nunber (PINl. The complete PIN shall be as shown in the following example: 5962 - jW25 f J, J, Drawing nhr Device type Case out 1 ine Lead finish (see 1.2.1) (see 1.2.2) (see 1.2.3) 1.2.1 Device tm(s1. The device type(s) shall identify the circuit function as follows: Device tm Generic nunber C

5、ircuit function 1.2.2 Case outline(s1. The case outlinecs) shall be as designated in MIL-STD-1835 and as folious: Outline letter DescriDtive desianator Termina Is Package style o1 02 STANDARD MICROCIRCUIT DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 825 1 O 825 1 O SIZE 5962-89725 A

6、RNISICNLML SET A 2 CHMOS single component asynchronous serial controller 1/ CHMOS sing1 e component asynchronous serial controller a X 3 GDIP1-T28 or CD I P2- T28 CPCC1-Y28 28 dual-in-line package 28 square leadless chip carrier 1.2.3 Lead finish. The lead finish shall be as specified in MIL-STD-883

7、 (see 3.1 herein). Finish letter I1Xl1 shall not be marked on the microcircuit or its packaging. finishes A, E, and C are considered acceptable and interchangeable uithout preference. The I1Xl8 designation is for use in specifications when lead 1.3 Absolute maximun ratinas. Voltage on any pin uith r

8、espect to GND- - - - - - - - -0.5 V dc to Vcc + 0.5 Storage temperature range - - - - - - - - - - - - - - -65C to +150C Maximum power dissipation (P,) 3/ - - - - - - - - - - 250 nt Thermal resistance, junction-to-case (OJc)- - - - - - See MIL-STD-1835 Junction Twperature (T,) - - - - - - - - - - - -

9、 - - 150OC Lead temperature (soldering, ID seconds)- - - - - - - 265OC 1.4 Recomnended operating conditions. Supply voltage (Vcc)- - - - - - - - - - - - - - - - - 4.5 V dc to 5.5 V dc Case operating temperature range (Tc) - - - - - - - - -55C to +125“C lJ VI, 2.4 V min. a VI, = 2.6 V min. - 3/ Must

10、withstand the added P, due to short circuit test; e.g., Ias. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-2. APPLICABLE DOCUMENTS 2.1 Govermient smcification. standards, and bulletin. Unless otherwise specified, the following specification, standa

11、rds, and bulletin of the issue listed in that issue of the Department of Defense Index of Specifications and Standards specified in the solicitation, form a part of this drawing to the extent specified herein. SPECIFICATION STANDARD MICROCIRCUIT DRAWING I DEFENSE ELECTRONICS SUPPLY CENTER MI LITARY

12、MIL-1-38535 - Integrated Circuits (Microcircuits) Manufacturing, General Specification for. SIZE 5962-89725 A STANDARDS MILITARY MIL-STD-883 - Test Methods and Procedures for Microelectronics. MIL-STD-1835 - Microcircuit Case Outlines. BULLETIN MIL I TARY MIL-BUL-103 - List of Standardized Military

13、Drawings (SMDfs). (Copies of the specification, standards, and bulletin required by manufacturers in connection with specific acquisition functions should be obtained from the contracting activity or as directed by the contracting activity.) 2.2 Order of precedence. in the event of a conflict betwee

14、n the text of this drawing and the references cited herein, the text of this drawing shall take precedence. 3. REQUIREMENTS 3.1 Item reauirements. The individual item requirements shall be in accordance with 1.2.1 of MIL-STD-883, “Provisions for the use of MIL-STD-883 in conjunction with conpliant n

15、on-JAN devices“ and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-1-38535 may be processed as QML product in accordance with t

16、he manufacturers approved program plan and qualifying activity approval in accordance with MIL-1.38535. requirements herein. shall not affect the PIN as described herein. required to identify when the QML flow option is used. This QML flow as docunented in the Quality Management (PMI pian may make m

17、odifications to the These modifications shall not affect form, fit, or function of the device. These modifications A Wi or iiQML1l certification mark in accordance with MIL-1-38535 is 3.2 Design, construction, and dwsical dimensions. The design, construction, and physical dimensions shall be as spec

18、ified in MIL-STD-883 (see 3.1 herein) and herein. 3.2.1 3.2.2 3.2.3 3.3 Electrical wrformance characteristics. Unless otherwise specified herein, the electrical performance Case outline(s1. Terminal connections. Block diagram. The case outline(s) shall be in accordance with 1.2.2 herein. The termina

19、l connections shall be as specified on figure 1. The block diagram shall be as specified on figure 2. characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test reuuirements. The electrical test requirements shall be the subgroups

20、specified in table II. The electrical tests for each subgroup are described in table I. I A 3 DAYTON, OHIO 45444 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-5962-B9725 REV A M 9999996 0073990 2iT Conditions Group A -55C 5 T, 5 +125“C 4.5 v dc

21、 5 v, 5 5.5 v dc subgroups Test svnaoi unless otherwise specified 1, 2, 3 Input low voltage VIL Limits 7 Min Max - I/ -0.5 0.8 V Input high voltage VI, Output low voltage VOL I, 2.0 mA Output high voltage V, i, = -0.4 mA Input leakage current I, I 0.0 V dc 5 V, 5 V, I Three-state leakage I, I 0.45 V

22、 dc 5 VOUT 5 Vc, - 0.45 V I current v, = 5.5 v, VIL = 0.5 v, VI, 2 V, - 0.5 V, Power supply current t +0.5 .: .- FG 3.8 mA/ Standby supply current I, IV, = 5.5 V, VIL 5 0.5 V, I 2 vCC - v# I, = I, = 0.0 v - RTS, DTR, strapping IOHR I current 1 Input capacitance c, Frequency = 1 MHz - See 4.3.1 lJ I/

23、O capacitance CIO X1, X2 load CxTAL I 11 Functional tests See 4.3.ld I* 11 4 10 pF 10 1, 2, 3 10 7, 8 STANDARD SIZE MICROCIRCUIT DRAWING A DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 FEVISICNLML A 5962-89725 WET 4 Provided by IHSNot for ResaleNo reproduction or networking permitted without

24、license from IHS-,-,-SMD-59b2-89725 REV A 9999996 0073991 10b CLK rise time I/ 31 W TABLE I. Electrical wrformance characteristics - Continued. tCHlCH2 I Conditions -55C 5 Tc 5 +125“C 4.5 V dc 5 Vcc 5 5.5 V dc unless otherwise swcified I I Test CLK period See figure 3 STANDARD MICROCIRCUIT DRAWING D

25、EFENSE ELECTRONICS SUPPLY CEN!J!ER DAYTON, OHIO 45444 I CLK period o/ Itcv I RESET width - CLK/XI It, I See figure 3, reset timing I configured to CLK - I RTS/DTR Lou setup to II_ I RESET inactive - RTS/DTR OU hold after It, I I RESET inactive I/ I See footnotes at end of table. Group A 8ubgroupr I,

26、 10, 1 54 I 250 I ns t 5962-89725 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,- SMD-5962-89725 REV A m 9999996 0073992 042 = - TABLE I. Electrical performance characteristics - Continued. 4.5 V dc 5 V, 5 5.5 V dc unless otherwise specified Data ou

27、t3 1 oa t delay after RD inactive - UR active width SCLK period tRHIL? t, See figure 3, write cycle timing Group A ubgroupr UR inactive SCLK period U SCLK low time I/ I/ 1, 10, 1 txcv See figure 3, setup and hold times waveforms t, See footnotes at end of table. I STANDARD MICROCIRCUIT DRAWING DEFEN

28、SE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 Lim Hin 2tcv +65 7 O 2tcv +65 tcv +15 2tC“ +15 7 O 90 12 216 93 93 3500 5962-89725 1 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-5962-89725 REV A b 0073993 T89 Condi ti ons Group A Limits subgro

29、ups 7 Synibol -55C 5 T, 5 +125OC Min Max 4.5 V dc 5 V, 5 5.5 V dc I unless otherwise specified See figure 3, setup and hold 9, 10, 11 1650 Test Unit ns SCLK LOW time 1/ 8J SCLK high time 1/ 8J tSCLKTXD I SCLK rise time I/ X1 - in this mode the clock is internally generated by an on-chip crystal osci

30、llator. be connected betueen this pin (Xl) and the X2 pin. This mode requires a crystal to This is a dual function- which may be configured to one of the follouing functions: WT2 - a general purpose output pin controtted by the CPU, only available uhen CLK/X1 pin is driven by an externall) generated

31、 clock; X2 - this pin serves as an output pin for the crystal oscillator. The configuration of the pin is done only durin! harduare reset. Serial data is transmitted via this output pin starting at the least significant bit. Serial data is received on this input pin starting at the least significant

32、 bit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-5762-89725 REV A W 9999996 0072002 b9T Power: + 5 V supply. 6.5 Pin descriptions - Continued. STANDARD SIZE MICROCIRCUIT DRAWING A DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 FEVISICN

33、LML A Pin 5962-89725 SET 16 - RI/SCLK - -I DSR/TA/OUTO - RTS - CTS - -1 CD/ICLK/WTl I Description This is a dual functionqin which can be configured to one of the following functions: RI - ring indicator - input, active low. This is a general purpose input pin accessible by the CPU. input pin may se

34、rve as a source for the internal serial clock(s), RxClk and/or TxClk. SCLK - this This is a dual function p& which may be configured to one of the following functions. DTR - data terminal ready, output, active low. This is a general purpose output pin controlled by the CPU. this pin outputs the BRGB

35、 output signal when configured as either a clock generator or as a timer. Uhen BRGB is configured as a timer this pin outputs a lltimer expired pulsem1. Uhen BRGB is configured as a clock generator it outputs the BRGB output clock. TB - This is a miltifunction pi which may be configured to one of th

36、e following functions. DSR - data set ready, input, active low. This is a general purpose input pin accessible by the CPU. TA - this pin is similar in function toin TB except it outputs the signal from BRGA instead of BRGB. This is a general purpose output pin controlled by the CPU. OUT0 - output pi

37、n. Request to send: Output pin, active low. output pin controlled by the CPU. In addition, in automatic trans- mission mode this pin, along with CTS, controls the transmission of data. During hardware reset this pin is an input. determine the system clock mode. This is a general purpose It is used t

38、o Clear to send: Input pin, active low. In automatic transmission mode it directly controls the transmit machine. general purpose input. This pin can be used as a Multifunction: This is a multifunction pin which may be configured to DCD - data carrier detected, input This is a general purpose input

39、pin accessible by one of the following functions. pin, active low. - the CPU. OUT1 - general purpose output pin, controlled by the CPU. ICLK - this pin is the output of the internal system clock. Ground. I 6.5 Comnents. Comnents on this drawing should be directed to DESC-EC, Dayton, Ohio 45444-5270,

40、 or telephone (513) 296-5377: 6.6 Awroved sources of suwly. Approved sources of supply are listed in MIL-BUL-103. The vendors listed in MIL-BUL-103 have agreed to this drawing and a certificate of conpliance (see 3.6 herein) has been submitted to and accepted by DESC-EC. Provided by IHSNot for Resal

41、eNo reproduction or networking permitted without license from IHS-,-,-SMD-5962-89725 REV A 9999996 0072003 526 STANDARDIZED MILITARY DRAWING SWRCE APPROVAL BULLETIN DATE: 95-03-29 Approved sources of supply for SM 5962-89725 are listed below for idiate acquisition only and shall be added to MIL-BUL-

42、103 during the next revision. deletion of sources. The vendors listed belou have agreed to this drawing and a certificate of conpliance has been submitted to and accepted by DESC-EC. MIL-BUL-103. MIL-BUL-103 uill be revised to include the addition or This bulletin is superseded by the next dated rev

43、ision of Standardized Vendor FIbitary drawing :z: 1 simi lar PIN I/ 5962-8972501XX MD825 1 O/B I 5962-89725023X I 34649 I MR82510/E IJ Caution. Do not use this nunber for item acquisition. may not satisfy the performance requirements of this drawing. Items acquired to this nunber Vendor CAGE nunber

44、34649 Vendor name and address Intel Corporation Robert Noyce Building FSOO1 2200 Mission College Blvd. P.O. Box 58119 Santa Clara, CA 95052-8119 Point of contact: 5000 West Chandler Elvd Chandler, A2 85226 The information contained herein is disseminated for convenience only and the Govermnt assunes no Liability uhatsoever for any inaccuracies in this information bulletin. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-