DLA SMD-5962-89769 REV B-2012 MICROCIRCUIT DIGITAL HIGH SPEED CMOS OCTAL D-TYPE FLIP-FLOP WITH DATA ENABLE TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Redraw the switching waveforms and add notes to figure 4, switching waveforms and test circuit. Update the boilerplate to current requirements as specified in MIL-PRF-38535. Editorial changes throughout. jak 06-06-15 Thomas M. Hess B Correct outp

2、ut current conditions for VOHand VOLtests in table I. Modify footnote 2 in table I to be more correct. Update the boilerplate to current requirements as specified in MIL-PRF-38535. Editorial changes throughout jak. 12-03-26 Thomas M. Hess REV SHEET REV SHEET REV STATUS REV B B B B B B B B B B OF SHE

3、ETS SHEET 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY Marcia B. Kelleher DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Thomas J. Ricciuti THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY William J. Johnson MIC

4、ROCIRCUIT, DIGITAL, HIGH SPEED CMOS, OCTAL D-TYPE FLIP-FLOP WITH DATA ENABLE, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 90-08-27 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-89769 SHEET 1 OF 10 DSCC FORM 2233 APR 97 5962-E236-1

5、2 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89769 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device require

6、ments for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-89769 01 R A Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finis

7、h (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54HCT377 Octal D-type flip-flop with data enable, TTL compatible inputs 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as

8、follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) . -0.5 V dc to +7.0 V dc DC input voltage range

9、 (VIN) . -0.5 V dc to VCC + 0.5 V dc DC output voltage range (VOUT) -0.5 V dc to VCC+ 0.5 V dc DC input diode current (IIK) . 20 mA DC output diode current (per pin) (IOK) 20 mA DC drain current (per pin) (IOUT) 25 mA DC VCCor GND current (ICC, IGND) 50 mA Storage temperature range (TSTG) -65C to +1

10、50C Maximum power dissipation (PD) 500 mW 2/ Lead temperature (soldering, 10 seconds) . +300C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) . +175C 1.4 Recommended operating conditions. 1/ Supply voltage range (VCC) . +4.5 V dc to +5.5 V dc Input voltage range

11、(VIN) . 0.0 V dc to VCCOutput voltage range (VOUT) 0.0 V dc to VCCCase operating temperature range (TC) -55C to +125C Input rise or fall time (tr, tf): VCC= 4.5 V 0 to 500 ns Maximum clock frequency (fMAX): TC= +25C, VCC= 4.5 V . 25 MHz TC= -55C to +125C, VCC= 4.5 V . 17 MHz Minimum clock pulse widt

12、h (tW): TC= +25C, VCC= 4.5 V . 20 ns TC= -55C to +125C, VCC= 4.5 V . 30 ns Minimum setup time, E, Dn to CP (ts): TC= +25C, VCC= 4.5 V . 12 ns TC= -55C to +125C, VCC= 4.5 V . 18 ns Minimum hold time, Dn to CP (th1): TC= +25C, VCC= 4.5 V . 3 ns TC= -55C to +125C, VCC= 4.5 V . 3 ns Minimum hold time, E

13、 to CP (th2): TC= +25C, VCC= 4.5 V . 5 ns TC= -55C to +125C, VCC= 4.5 V . 5 ns 1/ Unless other wise specified, all voltages are referenced to ground. 2/ For TC= +100C to +125C, derate linearly at 8 mW/C. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-

14、,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89769 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this d

15、rawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD

16、-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at ht

17、tp:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the

18、text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JA

19、N class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accorda

20、nce with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the de

21、vice. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions sh

22、all be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.

23、2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD M

24、ICROCIRCUIT DRAWING SIZE A 5962-89769 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply o

25、ver the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A.

26、 The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certif

27、ication/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is

28、used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source o

29、f supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to th

30、is drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritime s agent, and the acquiring activity retain the option to review the manufa

31、cturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89769 DLA LAND AND

32、 MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TC +125C unless otherwise specified VCCGroup A subgroups Limits Unit Min Max High level output voltage VOHVIN= VIH = 2.0 V or VIL= 0.8 V

33、IOH= -20 A 4.5 V 1, 2, 3 4.4 V IOH= -4 mA 3.7 Low level output voltage VOLVIN= VIH = 2.0 V or VIL= 0.8 V IOL= +20 A 4.5 V 1, 2, 3 0.1 IOL= +4 mA 0.4 High level input voltage VIH2/ 4.5 V 1, 2, 3 2.0 Low level input voltage VIL2/ 4.5 V 0.8 Input capacitance CINSee 4.3.1c, TC= +25C 4 10 pF Quiescent su

34、pply current ICCVIN= VCCor GND, IOUT= 0 A 5.5 V 1, 2, 3 160 A Input leakage current IINVIN= VCCor GND 5.5 V 1, 2, 3 1.0 A Additional quiescent supply current, TTL input levels ICCAny one input, VIN = 2.4 V Other inputs, VIN= VCCor GND IOUT= 0.0 A 5.5 V 1, 2, 3 3.0 mA Functional tests See 4.3.1d 7, 8

35、 Propagation delay time, CP to Qn tPHL, tPLHCL= 50 pF See figure 4 4.5 V 9 38 ns 10, 11 57 Output transition time tTLH, tTHL3/ 4.5 V 9 15 ns 10, 11 22 1/ For power supply of 5 V 10 percent, the worst case output voltages (VOHand VOL) occur for HCT at 4.5 V. Thus, the 4.5 V values should be used when

36、 designing with this supply. Worst cases VIHand VILoccur at VCC= 5.5 V and 4.5 V, respectively. 2/ The VIHand VILtests are guaranteed if applied as forcing functions for VOHor VOLtests. 3/ Transition times (tTLH, tTHL), if not tested, shall be guaranteed to the specified limits in table I. Provided

37、by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89769 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 Device type 01 Case outline R Terminal number Terminal symbol 1 2 3

38、4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 EQ0 D0 D1 Q1 Q2 D2 D3 Q3 GND CP Q4 D4 D5 Q5 Q6 D6 D7 Q7 VCCFIGURE 1. Terminal connections. Operating mode Inputs Outputs E CP Dn Qn Load “H” l h H Load “L” l l L Hold h X No change Hold H X X No change L = Low voltage level H = High voltage level h = High

39、 voltage level one setup time prior to the high-to-low clock transition l = Low voltage level one setup time prior to the low-to-high clock transition = Low-to-high transition of the clock. X = Irrelevant FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted wit

40、hout license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89769 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD

41、 MICROCIRCUIT DRAWING SIZE A 5962-89769 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 NOTES: 1. CL= 50 pF or equivalent (includes test jig and probe capacitance). 2. Input signal from pulse generator: VIN= 0.0 V to 3.0 V; PRR 1 MHz; ZO= 50; tr= 6.0 ns

42、; tf= 6.0 ns; trand tfshall be measured from 0.3 V to 2.7 V and from 2.7 V to 0.3 V, respectively; duty cycle = 50 percent. 3. The outputs are measured one at a time with one transition per measurement. FIGURE 4. Switching waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or n

43、etworking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89769 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 9 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with

44、MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A,

45、 B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance

46、 with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. TABLE II. Electri

47、cal test requirements. MIL-STD-883 test requirements Subgroups (in accordance with MIL-STD-883, method 5005, table I) Interim electrical parameters (method 5004) - - - Final electrical test parameters (method 5004) 1*, 2, 3, 7, 8, 9 Group A test requirements (method 5005) 1, 2, 3, 4, 7, 8, 9, 10*, 1

48、1* Groups C and D end-point electrical parameters (method 5005) 1, 2, 3 * PDA applies to subgroup 1. * Subgroups 10 and 11, if not tested, shall be guaranteed to the specified limits in table I. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b.