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本文(DLA SMD-5962-89847 REV D-2009 MICROCIRCUIT DIGITAL ADVANCED CMOS OCTAL BUFFER LINE DRIVER WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf)为本站会员(孙刚)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-89847 REV D-2009 MICROCIRCUIT DIGITAL ADVANCED CMOS OCTAL BUFFER LINE DRIVER WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Change boilerplate to allow for class V criteria. Add class V devices to this SMD. Editorial changes throughout. 97-01-27 Monica L. Poelking B Correct figure 5. Update boilerplate. - jak 00-10-24 Thomas M. Hess C Add case outline Z. Update the bo

2、ilerplate to MIL-PRF-38535 requirements. Editorial changes throughout. - TVN 02-08-16 Thomas M. Hess D Correct test condition for high level and low level output voltage in the table I. Update the boilerplate paragraphs to current MIL-PRF-38535 requirements. - MAA 09-03-11 Thomas M. Hess REV SHEET R

3、EV SHEET REV D D D D SHEET 15 16 17 18 REV D D D D D D D D D D D D D D REV STATUS OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Monica L. Poelking CHECKED BY Monica L. Poelking DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil APPROVED BY Michael

4、 A. Frye DRAWING APPROVAL DATE 89-11-06 MICROCIRCUIT, DIGITAL, ADVANCED CMOS, OCTAL BUFFER/LINE DRIVER WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON SIZE A CAGE CODE 67268 5962-89847 STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES

5、 OF THE DEPARTMENT OF DEFENSE AMSC N/A REVISION LEVEL D SHEET 1 OF 18 DSCC FORM 2233 APR 97 5962-E134-09 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SIZE A 5962-89847 STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 432

6、18-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are refle

7、cted in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: For device classes M and Q: 5962 - 89847 01 R A Federal RHA Device Case Lead stock class designator type

8、 outline finish designator (see 1.2.1) (see 1.2.2) (see 1.2.4) (see 1.2.5) / / Drawing number For device class V: 5962 - 89847 01 V R A Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.

9、2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appr

10、opriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ACT241 Octal buffer/line driver with three-state outputs, TTL compatible inputs 02 54ACT11241 Octal buffe

11、r/line driver with three-state outputs, TTL compatible inputs 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as listed below. Since the device class designator has been added after the original issuance of this drawing, device cl

12、asses M and Q designators will not be included in the PIN and will not be marked on the device. Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A.

13、Q or V Certification and qualification to MIL-PRF-38535. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SIZE A 5962-89847 STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234

14、APR 97 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style L GDIP3-T24 or CDIP4-T24 24 Dual-in-line package R GDIP1-T20 or CDIP2-T20 20 Dual-in-line package S GDFP2-F20 or CDFP3-F20 20 Flat pack Z

15、GDFP1-G20 20 Flat pack with gullwing 2 CQCC1-N20 20 Square leadless chip carrier 3 CQCC1-N28 28 Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1.3 Absolute maximum ratings. 1

16、/ 2/ Supply voltage range (VCC) -0.5 V dc to +6.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC + 0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc Input clamp diode current (IIK) (VI VCC) 20 mA Output clamp diode current (IOK) (VO VCC) 20 mA DC output current (IOUT) . 50 mA

17、DC VCCor GND current (ICC, IGND) . 100 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD) 500 mW Lead temperature (soldering, 10 seconds). +260C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 3/ 1.4 Recommended operating c

18、onditions. 2/ 4/ Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Input voltage range (VIN) +0.0 V dc to VCCOutput voltage range (VOUT) +0.0 V dc to VCC Maximum low level input voltage (VIL) . 0.8 V Minimum high level input voltage (VIH) 2.0 V Case operating temperature range (TC) -55C to +125C Inp

19、ut rise and fall rate (t/V) 8 ns/V Maximum high level output current (IOH). -24 mA Maximum low level output current (IOL). +24 mA 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliab

20、ility. 2/ Unless otherwise noted, all voltages are referenced to GND. 3/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. 4/ The limits for the parameters specified herein shall apply ov

21、er the full specified VCCrange and case temperature range of -55C to +125C. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SIZE A 5962-89847 STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEE

22、T 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the

23、 solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTM

24、ENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, P

25、hiladelphia, PA 19111-5094.) 2.2 Non Government publications. The following document(s) for a part of this document to the extent specified herein. Unless otherwise specified, the issues of the documents which are DOD adopted are those listed in the issue of the DODISS cited in the solicitation. Unl

26、ess otherwise specified, the issues of documents not listed in the DODISS are the issues of the documents cited in the solicitation. ELECTRONIC INDUSTRIES ALLIANCE (EIA) JEDEC Standard No. 20 - Standard for Description of 54/74ACXXXX and 54/74ACTXXXX Advanced High-Speed CMOS Devices. (Applications f

27、or copies should be addressed to the Electronics Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834.) (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents may also be available in or

28、 through libraries or other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a

29、 specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the

30、 QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design

31、, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SIZE A 5962-89847 STANDAR

32、D MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.

33、3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Ground bounce load circuit and waveforms. The ground bounce load circuit and waveforms shall be as specified on figure 4. 3.2.6 Switching waveforms and te

34、st circuit. The switching waveforms and test circuit shall be as specified on figure 5. 3.3 Electrical performance characteristics and post-irradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and post-irradiation parameter limits are as specifi

35、ed in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the

36、 PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA des

37、ignator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q

38、“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requ

39、irements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an appro

40、ved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conforma

41、nce as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (

42、see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable req

43、uired documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 37 (see MIL-PRF-38535, appendix A). Provided by IHSNo

44、t for ResaleNo reproduction or networking permitted without license from IHS-,-,-SIZE A 5962-89847 STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Limits 3/ Test and

45、 MIL-STD-883 test method 1/ Symbol Test conditions 2/ -55C TC +125C +4.5 V VCC +5.5 V unless otherwise specified Device type and device class VCCGroup A subgroups Min Max Unit 4.5 V 4.4 For all inputs affecting output under test, VIH= 2.0 V or VIL= 0.8 V For all other inputs, VIN= VCCor GND, IOH= -5

46、0 A 5.5 V 5.4 4.5 V 3.7 For all inputs affecting output under test, VIH= 2.0 V or VIL= 0.8 V For all other inputs, VIN= VCCor GND, IOH= -24 mA 5.5 V 4.7 High level output voltage 3006 VOH For all inputs affecting output under test, VIH= 2.0 V or VIL= 0.8 V For all other inputs, VIN= VCCor GND, IOH=

47、-50 mA 4/ All All 5.5 V 1, 2, 3 3.85 V 4.5 V 0.1 For all inputs affecting output under test, VIH= 2.0 V or VIL= 0.8 V For all other inputs, VIN= VCCor GND, IOL= +50 A All All 5.5 V 1, 2, 3 0.1 1, 3 0.4 All V 2 0.5 1 0.4 All M, Q 4.5 V 2, 3 0.5 1, 3 0.4 All V 2 0.5 1 0.4 For all inputs affecting outp

48、ut under test, VIH= 2.0 V or VIL= 0.8 V For all other inputs, VIN= VCCor GND IOL= +24 mA All M, Q 5.5 V 2, 3 0.5 Low level output voltage 3007 VOL For all inputs affecting output under test, VIH= 2.0 V or VIL= 0.8 V For all other inputs, VIN= VCCor GND IOL=+50 mA 4/ All All 5.5 V 1, 2, 3 1.65 V 1 0.5 All V 2 10.0 1 0.5 Three-state output leakage current high 3021 IOZH5/ OE1 or OE2 = 2.0 V or 0.8 V For all other inputs, VIN= VCCor GND VOUT= 5.5 V All M, Q 5.5 V 2, 3 1

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