DLA SMD-5962-89862 REV A-2006 MICROCIRCUIT HYBRID LINEAR 16-BIT MICROPROCESSOR COMPATIBLE DIGITAL TO ANALOG CONVERTER《模拟数字转变器的16位可兼容微型处理器 线性混合微型电路》.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update drawing. 06-05-01 Raymond Monnin THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED. REV SHEET REV SHEET REV STATUS REV A A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Gary Zahn DEF

2、ENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Michael C. Jones POST OFFICE BOX 3990 COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Alan Barone MICROCIRCUIT, HYBRID, LINEAR, 16-BIT, MICROPROCESSOR COMPATIBLE, DI

3、GITAL TO ANALOG CONVERTER AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 92-08-18 AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-89862 SHEET 1 OF 14 DSCC FORM 2233 APR 97 5962-E349-06Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS

4、-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89862 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for class H hybrid microcircuits to be processed in accordance with MIL-PRF-3853

5、4 and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). 1.2 PIN. The PIN shall be as shown in the following example: 5962-89862 01 X X Drawing number Device type Case outline Lead finish (see 1.2.1) (see 1.2.2) (see 1.2.3) 1.2.1 Devi

6、ce type(s). The device type(s) shall identify the circuit function as follows: Device type Generic number Circuit function 01 HS9378TB 16-bit digital to analog converter, (16-bit linearity) 02 HS9378SB 16-bit digital to analog converter, (15-bit linearity) 1.2.2 Case outline(s). The case outline(s)

7、shall be as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X CDIP2-T28 28 Dual-in-line 1.2.3 Lead finish. The lead finish shall be as specified in MIL-PRF-38534. 1.3 Absolute maximum ratings. Positive supply voltage (VCC) . +17 V dc Negative

8、supply voltage (VEE) -22 V dc Logic inputs to logic ground . 5.7 V dc Analog inputs to analog ground: Pins 10 and 12 . VEEto VCCPin 11 . -9.0 V dc to +VCCPin 13 . 0.1 V dc Output voltage (VOUT). Indefinite short circuit to GND Storage temperature range -65C to +150C Lead temperature (soldering, 10 s

9、econds). +300C Power dissipation (PD) . 600 mW Thermal resistance, junction-to-case (JC): Case X See MIL-STD-1835 Junction temperature (TJ) +150C 1.4 Recommended operating conditions. Positive supply voltage range (VCC) . +14.25 V dc to +15.75 V dc Negative supply voltage range (VEE) -14.25 V dc to

10、-15.75 V dc Case operating temperature range (TA). -55C to +125C Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89862 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FO

11、RM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitati

12、on or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38534 - Hybrid Microcircuits, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard for Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDB

13、OOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Build

14、ing 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemp

15、tion has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item performance requirements for device class H shall be in accordance with MIL-PRF-38534. Compliance with MIL-PRF-38534 may include the performance of all tests herein or as designated in the device manufacturers Quality

16、 Management (QM) plan or as designated for the applicable device class. The manufacturer may eliminate, modify or optimize the tests and inspections herein, however the performance requirements as defined in MIL-PRF-38534 shall be met for the applicable device class. In addition, the modification in

17、 the QM plan shall not affect the form, fit, or function of the device for the applicable device class. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38534 and herein. 3.2.1 Case outline(s). The case outline(s) s

18、hall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Block diagram. The block diagram shall be as specified on figure 2. 3.2.4 Truth table(s). The truth table(s) shall be as specified on figure 3. 3.2.5 Unipolar and bi

19、polar code table(s). The unipolar and bipolar code table(s) shall be as specified on figure 4. 3.2.6 Functional diagram(s). The functional diagram(s) shall be as specified on figure 5. 3.2.7 Timing diagram(s). The timing diagram(s) shall be as specified on figure 6. Provided by IHSNot for ResaleNo r

20、eproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89862 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics. Unless otherwise specified herein, the

21、electrical performance characteristics are as specified in table I and shall apply over the full specified operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined

22、in table I. 3.5 Marking of device(s). Marking of device(s) shall be in accordance with MIL-PRF-38534. The device shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers vendor similar PIN may also be marked. 3.6 Data. In addition to the general performance requirements of M

23、IL-PRF-38534, the manufacturer of the device described herein shall maintain the electrical test data (variables format) from the initial quality conformance inspection group A lot sample, for each device type listed herein. Also, the data should include a summary of all parameters manually tested,

24、and for those which, if any, are guaranteed. This data shall be maintained under document revision level control by the manufacturer and be made available to the preparing activity (DSCC-VA) upon request. 3.7 Certificate of compliance. A certificate of compliance shall be required from a manufacture

25、r in order to supply to this drawing. The certificate of compliance (original copy) submitted to DSCC-VA shall affirm that the manufacturers product meets the performance requirements of MIL-PRF-38534 and herein. 3.8 Certificate of conformance. A certificate of conformance as required in MIL-PRF-385

26、34 shall be provided with each lot of microcircuits delivered to this drawing. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38534 or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM

27、 plan shall not affect the form, fit, or function as described herein. 4.2 Screening. Screening shall be in accordance with MIL-PRF-38534. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintaine

28、d by the manufacturer under document revision level control and shall be made available to either DSCC-VA or the acquiring activity upon request. Also, the test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method

29、1015 of MIL-STD-883. (2) TAas specified in accordance with table I of method 1015 of MIL-STD-883. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. P

30、rovided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89862 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Li

31、mits Test Symbol Conditions 1/ -55C TC +125C unless otherwise specified Group A subgroups Device types Min Max Unit DIGITAL INPUT: Low level input voltage VIL1 TTL load 2/ 1,2,3 All 0.8 V High level input voltage VIH1 TTL load 2/ 1,2,3 All 2.4 V Input current IINVIL= 0 V, VIH= 5 V 2/ 1,2,3 All 10 A

32、Setup time ts3/ 4/ 9,10,11 All 0 ns Latch control pulse width tp3/ 9,10,11 All 100 ns Data hold time th3/ 4/ 9,10,11 All 100 ns ANALOG OUTPUT: 1 All -0.20 +0.20 01 -0.30 +0.30 Scale factor error SFe 5/ 2,3 02 -0.35 +0.35 % FSR 1 All -0.05 +0.05 01 -0.07 +0.07 Initial offset unipolar VOSU5/ 2,3 02 -0

33、.10 +0.10 % FSR 1 All -0.10 +0.10 01 -0.10 +0.10 Initial offset bipolar VOSB5/ 2,3 02 -0.15 +0.15 % FSR Output impedance ZOUT3/ 1 All 1.0 ohm See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING

34、 SIZE A 5962-89862 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits Test Symbol Conditions 1/ -55C TC +125C unless otherwise specified Group A subgroups Device type Min Max Unit

35、 STATIC PERFORMANCE: 1 0.0015 2,3 01 0.0115 1 0.003 Integral linearity error ILE 6/ 2,3 02 0.013 % FSR 1 0.0015 2,3 01 0.0115 1 0.003 Differential linearity error DLE 7/ 2,3 02 0.013 % FSR 1 16 2,3 01 15 1 15 Monotonicity MON 2,3 02 14 BITS POWER SUPPLY: Positive power supply current ICC+14.25 V dc

36、VCC +15.75 V dc1,2,3 All 28.5 mA Negative power supply current IEE-14.25 V dc VEE -15.75 V dc 1,2,3 All -11.5 mA Rejection ratios PSRR 1,2,3 All -0.002 +0.002 % FS/ % VS Functional test 4.3.1c 7,8 All 1/ Unless otherwise specified, +14.25 V dc VCC +15.75 V dc and -14.25 V dc VEE -15.75 V dc. 2/ Volt

37、ages at logic inputs may not go below 0 volts or exceed +5.0 V. 3/ Parameter shall be tested as part of device initial characterization and after design and process change. Parameter shall be guaranteed to limits specified in table I for all lots not specifically tested. 4/ ts= setup time required f

38、or input data to be valid before CS, LBE, or HBE going active, th= hold time for CS to stay low. 5/ Adjust to zero. 6/ Integral linearity is measured per end-point definition. 7/ Differential linearity error is the deviation of an output step from the theoretical value of 1 LSB for any two adjacent

39、codes. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89862 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 Device types 01 and 02 Device types 01 and

40、02 Case outline X Case outline X Terminal number Terminal symbol Terminal number Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Bit 1 (MSB) Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7 Bit 8 LDAC Gain adjust Bipolar offset Range Summing junction VOUT15 16 17 18 19 20 21 22 23 24 25 26 27 28 -15 V dc (VEE)

41、+15 V dc (VCC) GND LBE CS HBE Bit 16 (LSB) Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89862 DEFENSE SUPPLY CENTER COLUMBUS

42、COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 8 DSCC FORM 2234 APR 97 Device types 01 and 02 interfaced with 8-bit microprocessor FIGURE 2. Block diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89

43、862 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 9 DSCC FORM 2234 APR 97 Control inputs A7- A3(CS) A2(LDAC) A1(HBE) A0(LBE) Operation Defined by switches to give low signal to CS when the device is addressed 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 All data

44、latched. Data into low byte of 1st buffer, all others latched. Data into high byte of 1st buffer, all others latched. Invalid address latched. Data into 2nd buffer (16 bits) and D/A, 1st buffer latched. Invalid address. Invalid address. Data directly to D/A from bus, latches transparent. A15- A2(CS)

45、 A1(LDAC) A0(HBE, LBE) Operation Defined by switches to give low signal to CS when the device is addressed 0 0 1 1 0 1 0 1 Data latched. Data into 1st buffer, 2nd buffer latched. Data into 2nd buffer, 1st buffer latched. Data directly to D/A, latches transparent. FIGURE 3. Truth table(s). Unipolar B

46、inary input Analog output 111 . . . . 111 100 . . . . 000 011 . . . . 111 000 . . . . 000 +F. S. -1 LSB +F. S. / 2 +F. S. / 2 -1 LSB 0 V Bipolar Binary input Analog output 111 . . . . 111 100 . . . . 000 011 . . . . 111 000 . . . . 000 +F. S. -1 LSB 0 V -1 LSB -F. S. FIGURE 4. Unipolar and bipolar c

47、ode table(s). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89862 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 10 DSCC FORM 2234 APR 97 FIGURE 5. Functional diagram(s) . P

48、rovided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89862 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 11 DSCC FORM 2234 APR 97 Interface to 8-bit microprocessor bus NOTES: 1. tSUsetup time required for input data to be valid before CS, LBE, or HBE going active is 0 ns minimum. 2. t