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本文(DLA SMD-5962-89890 REV B-2009 MICROCIRCUIT DIGITAL HIGH SPEED CMOS DUAL 4-STAGE BINARY COUNTER TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf)为本站会员(刘芸)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-89890 REV B-2009 MICROCIRCUIT DIGITAL HIGH SPEED CMOS DUAL 4-STAGE BINARY COUNTER TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Change tPLH3max limit for subgroup 9 in table I. Editorial changes throughout jak. 99-07-13 Monica L. Poelking B Update the boilerplate paragraphs to current requirement as specified in MIL-PRF-38535. - MAA 09-01-26 Charles F. Saffle REV SHEET RE

2、V SHEET REV STATUS REV B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Marcia B. Kelleher STANDARD MICROCIRCUIT DRAWING CHECKED BY Thomas J. Ricciuti DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE B

3、Y ALL DEPARTMENTS APPROVED BY Michael A Frye MICROCIRCUIT, DIGITAL, HIGH SPEED CMOS, DUAL 4-STAGE BINARY COUNTER, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 90-10-11 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-89890 SHEET 1 OF

4、11 DSCC FORM 2233 APR 97 5962-E136-09 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89890 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1

5、 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-89890 01 C A _ _ _ Drawing number Device t

6、ype Case outline Lead finish (see 1.2.1) (see 1.2.2) (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54HCT393 Dual 4-stage binary counter, TTL compatible inputs 1.2.2 Case outline(s). The case outline(s) ar

7、e as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style C GDFP1-T14 14 Dual-in-line package 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1.3 Absolu

8、te maximum ratings. 1/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC+0.5 V dc DC output voltage range (VOUT). -0.5 V dc to VCC+0.5 V dc DC input diode current (IIK) 20 mA DC output diode current (IOK) (per pin) 20 mA DC drain current (per pin) 25 mA

9、DC VCCor GND current . 50 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD): 500 mW 2/ Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC). See MIL-STD-1835 Junction temperature (TJ) +175C 1/ Unless otherwise specified, all voltag

10、es are referenced to ground. 2/ For TC= +100C to +125C, derate linearly at 8 mW/C. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89890 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL

11、 B SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Case operating temperature range (TC) . -55C to +125C Input rise or fall time tr, tf) (VCC= 4.5 V). 0 to 500 ns Maximum input clock pulse frequency (fMAX): TC= +25C, VCC= 4.5 V 27

12、 MHz TC= -55C to +125C, VCC= 4.5 V 18 MHz Minimum clock pulse width (tw1): TC= +25C, VCC= 4.5 V 19 ns TC= -55C to +125C, VCC= 4.5 V 29 ns Minimum reset clock pulse width (tw2): TC= +25C, VCC= 4.5 V 16 ns TC= -55C to +125C, VCC= 4.5 V 24 ns Minimum reset recovery time (trec): TC= +25C, VCC= 4.5 V 5 n

13、s TC= -55C to +125C, VCC= 4.5 V 5 ns 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those c

14、ited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outli

15、nes. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Bu

16、ilding 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific ex

17、emption has been obtained. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89890 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Ite

18、m requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufac

19、turer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may mak

20、e modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option

21、 is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.2 Truth table. The truth table sha

22、ll be as specified on figure 2. 3.2.3 Logic diagram(s). The logic diagram(s) shall be as specified on figure 3. 3.2.4 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified in figure 4. 3.2.5 Case outline. The case outline shall be in accordance with 1.2

23、.2 herein. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full (case) operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall

24、be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For

25、packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PR

26、F-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be li

27、sted as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7

28、Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required in accordance with MIL-PRF-38535, appendix A.

29、3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction

30、or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89890 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Test conditions 1/ -55C TC +125C +

31、4.5 V VCC +5.5 V Group A subgroups Limits Unit unless otherwise specified Min Max IOH= -20 A 4.4 V High level output voltage VOHVCC= 4.5 V VIH= 2.0 V or VIL = 0.8 V IOH= -4.0 mA 1, 2, 3 3.7 IOL= +20 A 0.1 V Low level output voltage VOLVCC= 4.5 V VIH= 2.0 V or VIL = 0.8 V IOL= +4.0 mA 1, 2, 3 0.4 Hig

32、h level input voltage VIH 2/ VCC= 4.5 V 1, 2, 3 2.0 V Low level input voltage VIL2/ VCC= 4.5 V 1, 2, 3 0.8 V Input capacitance CINTA= +25C See 4.3.1c 4 10.0 pF Quiescent supply current ICCVIN= VCC or GND IOUT= 0.0 A 1, 2, 3 160 A Input leakage current IINVCC= 5.5 V, VIN= VCCor GND 1, 2, 3 1.0 V Quie

33、scent supply current delta, TTL input levels ICCAny one input: VIN= 2.4 V Other inputs: VIN= VCCor GND IOUT = 0.0 A, VCC= 5.5 V 1, 2, 3 3.0 mA Functional test See 4.3.1d 7, 8 L H 9 32 Propagation delay time, CPn to Q0n tPLH1 tPHL1VCC= 4.5 V CL= 50 pF minimum See figure 4 10, 11 48 ns 9 12 Propagatio

34、n delay time, Qn to Qn + 1 tPLH2 tPHL23/ VCC= 4.5 V CL= 50 pF minimum See figure 4 10, 11 18 ns 9 44 Propagation delay time, CPn to Q1n tPLH3 tPHL33/ VCC= 4.5 V CL= 50 pF minimum See figure 4 10, 11 66 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permi

35、tted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89890 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics-Continued. Test Symbol Test conditions 1/ -55C TC +125C +4.5 V VCC

36、 +5.5 V Group A subgroups Limits Unit unless otherwise specified Min Max 9 50 Propagation delay time, CPn to Q2n tPLH4 tPHL43/ VCC= 4.5 V CL= 50 pF minimum See figure 4 10, 11 75 ns 9 62 Propagation delay time, CPn to Q3n tPLH5 tPHL5VCC= 4.5 V CL= 50 pF minimum See figure 4 10, 11 93 ns 9 32 Propaga

37、tion delay time, CPn to Q4n tPLH6 tPHL6VCC= 4.5 V CL= 50 pF minimum See figure 4 10, 11 48 ns 9 15 Output transition time tTLH tTHLVCC= 4.5 V CL= 50 pF minimum See figure 4 10, 11 22 ns 1/ For a power supply of 5 V 10, the worst case output voltages (VOHand VOL) occur for HCT at 4.5 V. Thus, the 4.5

38、 V values should be used when designing with this supply. Worst cases VIHand VILoccur at VCC= 5.5 V and 4.5 V respectively. 2/ The VIHand VILtests are not required, and shall be applied as forcing functions for the VOHor VOLtests. 3/ Guaranteed, if not tested, to the specified limits. 4/ Transition

39、time (tTLH, tTHL), if not tested, shall be guaranteed to the specified limits. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89890 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B S

40、HEET 7 DSCC FORM 2234 APR 97 Device type 01 Case outline C Terminal number Terminal symbol 1 1CP 2 MR1 3 Q01 4 Q11 5 Q21 6 Q31 7 GND 8 Q32 9 Q22 10 Q12 11 Q02 12 MR2 13 2CP 14 VCCFIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from

41、 IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89890 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 Inputs Output state Outputs CPn MRn Qn CPn Count Q0n Q1n Q2n Q3n X L L H No change Count L 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 L H L H L

42、H L H L H L H L H L H L L H H L L H H L L H H L L H H L L L L H H H H L L L L H H H H L L L L L L L L H H H H H H H H H = High voltage level. L = Low voltage level. X = Irrelevant. = Low-to-high clock transition. = High-to-low clock transition. FIGURE 2. Truth table. FIGURE 3. Logic diagram.Provided

43、 by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89890 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 9 DSCC FORM 2234 APR 97 NOTES: 1. CL= 50 pF minimum or equivalent (includes jig an

44、d probe capacitance). FIGURE 4. Switching waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89890 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 10 D

45、SCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conforma

46、nce inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activi

47、ty upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein,

48、except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in

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