1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R188-92. 92-04-14 Tim H. Noh B Redraw with changes. Update to current requirements. Editorial changes throughout. - gap 06-07-06 Raymnd Monnin The original first page of this drawing has been replaced. REV SHET
2、 REV SHET REV STATUS REV B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 PMIC N/A PREPARED BY Tim H. Noh DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Tim H. Noh COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY AL
3、L DEPARTMENTS APPROVED BY William K. Heckman MICROCIRCUITS, DIGITAL, BIPOLAR, ADVANCED LOW POWER SCHOTTKY TTL, 8-BIT D-TYPE AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 89-09-06 EDGE-TRIGGERED READ BACK LATCHES, MONOLITHIC SILICON AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5
4、962-89945 SHEET 1 OF 13 DSCC FORM 2233 APR 97 5962-E331-06 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89945 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 223
5、4 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-89945 01 K X Drawing
6、number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ALS996 8-bit D-type edge-triggered read back latches 1.2.2 Case outline(s). The case outlin
7、e(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style K GDFP2-F24 or CDFP3-F24 24 flat L GDIP3-T24 or CDIP4-T24 24 dual-in-line 3 CQCC1-N28 28 square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appen
8、dix A. 1.3 Absolute maximum ratings. Supply voltage range -0.5 V dc to +7.0 V dc DC input voltage ( G, RD , EN , CLK and C/T ) . +7.0 V dc Voltage applied to D and to disabled three-state outputs . +5.5 V dc Storage temperature range -65C to +150C Lead temperature (soldering, 10 seconds) . +300C The
9、rmal resistance, junction-to-case (JC) . See MIL-STD-1835 Maximum power dissipation (PD) 1/ . 467.5 mW Junction temperature (TJ) . +175C 1.4 Recommended operating conditions. Supply voltage (VCC) . +4.5 V dc to +5.5 V dc Minimum high level input voltage (VIH) : G and RD . +2.2 V dc All others +2.0 V
10、 dc Maximum low level input voltage (VIL) 0.8 V dc Case operating temperature range (TC) . -55C to +125C _ 1/ Maximum power dissipation is defined as VCCx ICCand must withstand the added PD due to short-circuit output test, e.g., IOProvided by IHSNot for ResaleNo reproduction or networking permitted
11、 without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89945 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards
12、, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DE
13、PARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these
14、 documents are available online at http:/assist.daps.dla.mil;quicksearch/ or www.dodssp.daps.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and th
15、e references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-P
16、RF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be proc
17、essed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect f
18、orm, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construct
19、ion, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table
20、shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Test circuit and switching waveforms. The test circuit and switching waveforms shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified
21、herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are d
22、escribed in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89945 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3.5 Marking. Marking shall be
23、 in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not m
24、arking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-
25、38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to lis
26、ting as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of m
27、icrocircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and appl
28、icable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance
29、with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under
30、 document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, mi
31、nimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IH
32、S-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89945 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Limits Test Symbol Conditions -55C TC +125C 1/ unless otherwise specified Group A subgroups M
33、in Max Unit VCC= 4.5 V, IOH= -0.4 mA All outputs 2.5 High level output voltage VOHVCC= 4.5 V, IOH= -1.0 mA Qn outputs 1, 2, 3 2.4 V IOL = 12 mA Qn outputs 0.4 Low level output voltage VOLVCC= 4.5 V IOL = 4.0 mA Dn outputs 1, 2, 3 0.4 V Input clamp voltage VICVCC= 4.5 V, IIC= -18 mA 1, 2, 3 -1.2 V Ou
34、tput current IOVCC= 5.5 V, CLR = 2.5 V VOUT= 2.25 V 1/ 1, 2, 3 -20 -112 mA IOZHVCC= 5.5 V, VOUT= 2.7 V 1, 2, 3 20 A Off-state output current IOZLVCC= 5.5 V, VOUT= 0.4 V 1, 2, 3 -20 A VCC= 5.5 V, VIN= 5.5 V Dn inputs 0.1 IIH1VCC= 5.5 V, VIN= 7.0 V All other inputs 1, 2, 3 0.1 mA Dn inputs 20 High lev
35、el input current IIH2VCC= 5.5 V, VIN= 2.7 V 2/ All other inputs 1, 2, 3 20 A Dn inputs -0.1 Low level input current IILVCC= 5.5 V, VIN= 0.4 V 2/ All other inputs 1, 2, 3 -0.1 mA Outputs high 55 Outputs low 85 Supply current ICCVCC= 5.5 V Outputs disabled1, 2, 3 65 mA Maximum operating frequency fMAX
36、VCC= 4.5 V to 5.5 V CL= 50 pF 9, 10, 11 35 MHz Data 15 EN low 10 CLK high before EN 15 Setup time tsRL= 500 see figure 4 CLR high (inactive) 9, 10, 11 10 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICRO
37、CIRCUIT DRAWING SIZE A 5962-89945 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits Test Symbol Conditions -55C TC +125C 1/ unless otherwise specified Group A subgroups Min Max U
38、nit Data 1 EN low 5 Hold time thRD high 9, 10, 11 5 ns CLR low 10 CLK low 14.5 Pulse duration twVCC= 4.5 V to 5.5 V CL= 50 pF RL= 500 see figure 4 CLK high 9, 10, 11 14.5 ns tPLH15 30 Propagation delay time, CLK to any Qn tPHL19, 10, 11 5 24 ns tPLH25 27 Propagation delay time, CLR to any Qn tPHL29,
39、 10, 11 5 23 ns tPLH34 23 Propagation delay time, C/T to any Qn tPHL39, 10, 11 5 23 ns Propagation delay time, CLR to any Dn tPHL49, 10, 11 5 30 ns tPZH12 18 Output enable time, RD to any Dn tPZL19, 10, 11 2 18 ns tPHZ11 19 Output disable time, RD to any Dn tPLZ19, 10, 11 1 19 ns tPZH22 17 Output en
40、able time, EN to any Dn tPZL29, 10, 11 2 17 ns tPHZ21 19 Output disable time, EN to any Dn tPLZ29, 10, 11 1 19 ns tPZH32 15 Output enable time, G to Qn tPZL39, 10, 11 2 15 ns tPHZ31 11 Output disable time, G to Qn tPLZ39, 10, 11 1 11 ns 1/ The output conditions have been chosen to produce a current
41、that closely approximates one half of the true short-circuit output current, IOS. 2/ For I/O ports, the parameters IIHand IILinclude the off-state output current. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 59
42、62-89945 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 Case outlines L and K 3 Terminal number Terminal symbol 1 D1 NC 2 D2 D1 3 D3 D2 4 D4 D3 5 D5 D4 6 D6 D5 7 D7 D6 8 D8 NC 9 EN D7 10 RD D8 11 CLK EN 12 GND RD 13 CLR CLK 14 C/T GND 15 G NC
43、16 Q8 CLR 17 Q7 C/T 18 Q6 G 19 Q5 Q8 20 Q4 Q7 21 Q3 Q6 22 Q2 NC 23 Q1 Q5 24 VCCQ4 25 - - - Q3 26 - - - Q2 27 - - - Q1 28 - - - VCCNC = No internal connection FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MIC
44、ROCIRCUIT DRAWING SIZE A 5962-89945 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 Inputs Output G C/T CLR RD EN CLK Dn Qn H X X X X X X Z L H H H L X D L X H L L X Read back D L X L X X X X L L X H L H H Disable QOL L H H L X D H = High volta
45、ge level L = Low voltage level X = Irrelevant = Transition from low to high QO= Q level before steady-state input conditions were established. NOTE: Transitions on EN should only be made with CLK high in order to prevent false clocking. FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduc
46、tion or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89945 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 9 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permit
47、ted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89945 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 10 DSCC FORM 2234 APR 97 FIGURE 4. Test circuit and switching waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitt
48、ed without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89945 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 11 DSCC FORM 2234 APR 97 NOTES: 1. CLincludes probe and jig capacitance. 2. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. 3. Waveform 2 is for an output with internal conditions such that the output is high except whe
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