DLA SMD-5962-89954 REV B-2013 MICROCIRCUIT DIGITAL HIGH-SPEED CMOS DUAL SYNCHRONOUS COUNTER MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Correct title to accurately describe device. Update boilerplate to MIL-PRF-38535 requirements. - LTG 07-01-24 Thomas M. Hess B Update boilerplate paragraphs to the current MIL-PRF-38535 requirements. - LTG 13-03-25 Thomas M. Hess REV SHEET REV B

2、SHEET 15 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Wanda L. Meadows DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTME

3、NTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY Tim H. Noh APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, HIGH-SPEED CMOS, DUAL SYNCHRONOUS COUNTER, MONOLITHIC SILICON DRAWING APPROVAL DATE 93-02-05 REVISION LEVEL B SIZE A CAGE CODE 67268 5962-89954 SHEET 1 OF 15 DSCC FORM 2

4、233 APR 97 5962-E280-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89954 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing de

5、scribes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-89954 01 E A Drawing number Device type (see 1.2.1) Case outline

6、(see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54HC4520 Dual synchronous counter 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline

7、 letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5

8、V dc to VCC+ 0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc DC input diode current (IIK) (VINVCC+ 0.5 V) . 20 mA DC output diode current (IOK) (VOUTVCC+ 0.5 V) 20 mA DC output current, per output (IOUT) . 25 mA DC VCCor GND current (ICC, IGND) 50 mA Storage temperature range (T

9、STG) -65C to +150C Maximum power dissipation (PD) . 500 mW 4/ Lead temperature (soldering, 10 seconds) . +265C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) . +175C _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Exte

10、nded operation at the maximum levels may degrade performance and affect reliability. The maximum junction temperature may be exceeded for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. 2/ Unless otherwise specified, all voltages are referenced to

11、 ground. 3/ The limits for the parameters specified herein shall apply over the full specified VCCrange and case temperature range of -55C to +125C. 4/ For TC= +100C to +125C, derate linearly at 8 mW/C to 300 mW. Provided by IHSNot for ResaleNo reproduction or networking permitted without license fr

12、om IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89954 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. 1/ 2/ Supply voltage range (VCC) +2.0 V dc to +6.0 V dc Input voltage range (VIN) 0.0 V dc to VCCOutput volt

13、age range (VOUT) . 0.0 V dc to VCCCase operating temperature range (TC) . -55C to +125C Maximum low level input voltage (VIL): VCC= 2.0 V . 0.5 V dc VCC= 4.5 V . 1.35 V dc VCC= 6.0 V . 1.8 V dc Minimum high level input voltage (VIH): VCC= 2.0 V . 1.5 V dc VCC= 4.5 V . 3.15 V dc VCC= 6.0 V . 4.2 V dc

14、 Input rise and fall rate (tr, tf) maximum: VCC= 2.0 V . 1000 ns VCC= 4.5 V . 500 ns VCC= 6.0 V . 400 ns Maximum clock frequency (fmax): VCC= 2.0 V . 4 MHz VCC= 4.5 V . 20 MHz VCC= 6.0 V . 24 MHz Minimum clock pulse width (tw1): VCC= 2.0 V . 120 ns VCC= 4.5 V . 24 ns VCC= 6.0 V . 20 ns Minimum MR pu

15、lse width (tw2): VCC= 2.0 V . 150 ns VCC= 4.5 V . 30 ns VCC= 6.0 V . 26 ns Minimum setup time, CP to enable (tsu(L): VCC= 2.0 V . 120 ns VCC= 4.5 V . 24 ns VCC= 6.0 V . 20 ns Minimum setup time, enable in to CP (tsu(H): VCC= 2.0 V . 120 ns VCC= 4.5 V . 24 ns VCC= 6.0 V . 20 ns Minimum removal time,

16、MR to CP (trem) . 0 ns Minimum removal time, MR to enable (trem) . 0 ns Maximum high level output current (IOH) -5.2 mA Maximum low level output current (IOL) +5.2 mA 1/ Unless otherwise specified, all voltages are referenced to ground. 2/ Unless otherwise specified, the values listed shall apply ov

17、er the full VCCand TCrecommended operating range. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89954 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 2. APPLIC

18、ABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTME

19、NT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-

20、103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-G

21、overnment publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents cited in the solicitation or contract. JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JESD7 - Standard for Description of 54/74HC

22、XXXXX and 54/74HCTXXXXX Advanced High-Speed CMOS Devices. (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10thStreet, Suite 240-S Arlington, VA 22201-2107). 2.3 Order of precedence. In the event of a conflict between

23、 the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements s

24、hall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certificat

25、ion to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These

26、modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical d

27、imensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Tru

28、th table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. Provided by IHSNot for ResaleNo reproduction

29、or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89954 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performanc

30、e characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking.

31、 Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has th

32、e option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accorda

33、nce with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA

34、 Land and Maritime -VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A s

35、hall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritimes agent, and

36、 the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-

37、,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89954 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test and MIL-STD-883 test method Symbol Test conditions -55C TC +125C 4.5 V VCC 5.5 V unless otherwise spe

38、cified VCCGroup A subgroups Device type Limits Unit Min Max High level output voltage, CMOS loads 3006 1/ VOH12/ For all inputs affecting output under test VIN= VIHor VILVIH= 1.5 V VIL= 0.5 V For all other inputs VIN= VCCor GND IOH= -20 A 2.0 V 1, 2, 3 All 1.9 V VOH2For all inputs affecting output u

39、nder test VIN= VIHor VILVIH= 3.15 V VIL= 1.35 V For all other inputs VIN= VCCor GND IOH= -20 A 4.5 V 1, 2, 3 All 4.4 V VOH32/ For all inputs affecting output under test VIN= VIHor VILVIH= 4.2 V VIL= 1.8 V For all other inputs VIN= VCCor GND IOH= -20 A 6.0 V 1, 2, 3 All 5.9 V High level output voltag

40、e, TTL loads 3006 1/ VOH4For all inputs affecting output under test VIN= VIHor VILVIH= 3.15 V VIL= 1.35 V For all other inputs VIN= VCCor GND IOH= -4 mA 4.5 V 1 All 3.98 V 2, 3 3.7 VOH52/ For all inputs affecting output under test VIN= VIHor VILVIH= 4.2 V VIL= 1.8 V For all other inputs VIN= VCCor G

41、ND IOH= -5.2 mA 6.0 V 1 All 5.48 V 2, 3 5.2 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89954 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC F

42、ORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test and MIL-STD-883 test method Symbol Test conditions -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified VCCGroup A subgroups Device type Limits Unit Min Max Low level output voltage, CMOS loads 3007 1/ VOL12/ For all

43、 inputs affecting output under test VIN= VIHor VILVIH= 1.5 V VIL= 0.5 V For all other inputs VIN= VCCor GND IOL= +20 A 2.0 V 1, 2, 3 All 0.1 V VOL2For all inputs affecting output under test VIN= VIHor VILVIH= 3.15 V VIL= 1.35 V For all other inputs VIN= VCCor GND IOL= +20 A 4.5 V 1, 2, 3 All 0.1 V V

44、OL32/ For all inputs affecting output under test VIN= VIHor VILVIH= 4.2 V VIL= 1.8 V For all other inputs VIN= VCCor GND IOL= +20 A 6.0 V 1, 2, 3 All 0.1 V Low level output voltage, TTL loads 3007 1/ VOL4For all inputs affecting output under test VIN= VIHor VILVIH= 3.15 V VIL= 1.35 V For all other i

45、nputs VIN= VCCor GND IOL= +4 mA 4.5 V 1 All 0.26 V 2, 3 0.4 VOL52/ For all inputs affecting output under test VIN= VIHor VILVIH= 4.2 V VIL= 1.8 V For all other inputs VIN= VCCor GND IOL= +5.2 mA 6.0 V 1 All 0.26 V 2, 3 0.4 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction o

46、r networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89954 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test and MIL-STD-883 test method Symbol Test c

47、onditions -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified VCCGroup A subgroups Device type Limits Unit Min Max Input current high 3010 IIHFor input under test VIN= VCCFor all other inputs VIN= VCCor GND 6.0 V 1 All 0.1 A 2, 3 1.0 Input current low 3009 IILFor input under test VIN= GND For a

48、ll other inputs VIN= VCCor GND 6.0 V 1 All -0.1 A 2, 3 -1.0 Quiescent supply current, output high 3005 ICCHFor all inputs VIN= VCCor GND 6.0 V 1 All 8.0 A 2, 3 160 Quiescent supply current, output low 3005 ICCLFor all inputs VIN= VCCor GND 6.0 V 1 All 8.0 A 2, 3 160 Input capacitance 3012 CINTC= 25C See 4.3.1c 4 All 10 pF Truth table test output voltage See 4.3.1d 7, 8 All Propagation delay time, CP to Qn3003 tPLH, tPHLCL= 50 pF minimum See figure 4 2.0 V 2/ 9 All 240 ns 10, 11 360 4.5 V 9 48 10, 11 72 6.0 V 2/