DLA SMD-5962-90527 REV A-2006 MIRCOCIRCUIT DIGITAL INTERFACE TRANSPARENT ASYNCHRONOUS TRANSMITTER MONOLITHIC SILICON《硅单片 透明异步传输器接口 数字微型电路》.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update boilerplate to MIL-PRF-38535 requirements. - CFS 06-01-26 Thomas M. Hess REV SHET REV A A A A A A A SHEET 15 16 17 18 19 20 21 REV STATUS REV A A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY

2、 Christopher A. Rauch DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Tim H. Noh COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, INTERFACE, TRANSPARENT ASYNCHRONOUS AND

3、 AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 93-02-18 TRANSMITTER, MONOLITHIC SILICON AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-90527 SHEET 1 OF 21 DSCC FORM 2233 APR 97 5962-E013-06 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from

4、 IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90527 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and s

5、pace application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example

6、: 5962 - 90527 01 Q X X Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 speci

7、fied RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify t

8、he circuit function as follows: Device type Generic number Circuit function 01 7968-125V Transparent asynchronous transmitter interface 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements d

9、ocumentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-183

10、5 and as follows: Outline letter Descriptive designator Terminals Package style X GDIP1-T28 or CDIP2-T28 28 Dual-in-line 3 CQCC2-N28 28 Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device

11、class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90527 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply v

12、oltage range (VCC) to ground potential continuous -0.5 V dc to +7.0 V dc DC voltage range applied to outputs. -0.5 V dc to VCCmaximum DC input voltage range (VIN). -0.5 V dc to + 5.5 V dc DC output current . 100 mA DC input current range . -30 mA to +5.0 mA Storage temperature range. -65C to +150C M

13、aximum power dissipation (PD) 2.1 W 2/ Lead temperature (soldering, 10 seconds) . +300C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Maximum junction temperature (TJ) +155C 1.4 Recommended operating conditions. Supply voltage range (VCC). +4.75 V dc to +5.5 V dc Minimum high-level inpu

14、t voltage (VIH) . 2.1 V dc Maximum low level input voltage (VIL) 0.8 V dc Case operating temperature range (TC) -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the exten

15、t specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method

16、Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla

17、.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawin

18、g takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance

19、and affect reliability. 2/ Must withstand the added PDdue to short circuit test, e.g., ISC. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90527 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVIS

20、ION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in

21、the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The des

22、ign, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The termina

23、l connections shall be as specified on figure 1. 3.2.3 Truth tables. The truth tables shall be as specified on figure 2. 3.2.4 Functional block/logic diagram. The functional block/logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and

24、 test circuit shall be as specified on figure 4. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the fu

25、ll case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, t

26、he manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking fo

27、r device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compl

28、iance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herei

29、n). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing sha

30、ll affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and

31、V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquire

32、d to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentati

33、on shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 104 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networkin

34、g permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90527 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Limits Test Symbol Conditions 1/ -55C TC+125C 4.75 V VCC 5

35、.5 V unless otherwise specified Group A subgroups Device type Min Max Unit Bus interface signals: DI0-DI7, DI8/CI3, DI9/CI2, CI0-CI1, STRB, ACK, CLK Output high voltage ACK, CLK VOHVCC= 4.75 V, IOH= -1 mA, VIN= 0.0 V or 3.0 V 2.4 V Output low voltage ACK, CLK VOLVCC= 4.75 V, IOL= 8 mA, VIN= 0.0 V or

36、 3.0 V 0.45 V Input high voltage VIHVCC= 5.5 V 2/ 2.1 Input low voltage VILVCC= 5.5 V 2/ 0.8 V Input clamp voltage VIVCC= 4.75 V, IIN= -18 mA -1.5 V Input low current IILVCC= 5.5 V, VIN= 0.4 V -400 A Input high current IIHVCC= 5.5 V, VIN= 2.7 V 50 A All inputs except CLK 50 Input leakage current IIV

37、CC= 5.5 V, VIN= 5.5 V CLK input 150 A Output short circuit current ACK, CLK ISC3/ 1, 2, 3 All -15 -85 mA Serial interface signals: SEROUT+, SEROUT- Output high voltage VOHVCC= 4.75 V, ECL load VCC 1.165 VCC 0.88 V Output low voltage VOLVCC= 4.75 V, ECL load 1, 2, 3 All VCC 1.81 VCC 1.62 V See footno

38、tes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90527 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performan

39、ce characteristics - Continued. Limits Test Symbol Conditions 1/ -55C TC+125C 4.75 V VCC 5.5 V unless otherwise specified Group A subgroupsDevice type Min Max Unit Miscellaneous signals: X1, VCC1, VCC2, VCC3Input high voltage X1VIHXVCC= 5.5 V 2/ 2.1 V Input low voltage X1VILX0.8 V Input low current

40、X1IILXVIN= 0.45 V -900 A Input high current X1IIHXVIN= 2.4 V +600 A pin VCC1 (TTL) 30 pin VCC2 (ECL) 45 Supply current ICCSEROUT = ECL load, DMS = 0, VCC1= VCC2= VCC3= 5.5 V pin VCC3 (CML)1, 2, 3 All 215 mA Bus interface signals: DI0-DI7, DI8/CI3, DI9/CI2, CI0-CI1, STRB, ACK, CLK CLK period t18n 25n

41、 ns CLK pulse width high t225 CLK pulse width low t3ns STRB pulse width high 5/ t420 STRB pulse width low t5ns Internal byte boundary to CLK 6/ t6(-9t1/8n) + 3 25 ns Data-STRB setup time t910 ns Data-STRB hold time t10See figure 4. 4/ 9, 10, 11 All 15 ns See footnotes at end of table. Provided by IH

42、SNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90527 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Lim

43、its Test Symbol Conditions 1/ -55C TC+125C 4.75 V VCC 5.5 V unless otherwise specified Group A subgroupsDevice type Min Max Unit Bus interface signals: DI0-DI7, DI8/CI3, DI9/CI2, CI0-CI1, STRB, ACK, CLK - Continued. ACK to STRB hold 7/ t110 ns ACK to STRB hold t12STRB to ACK 8/ t1345 ns STRB to ACK

44、t1425 CLK to ACK 8/ t15See figure 4. 4/ TTL output load 9, 10, 11 All (3t1/n) + 43 ns Miscellaneous signals: X19/ X1pulse width high 10/ t2935 ns X1pulse width low 10/ t30See figure 4. TTL output load on CLK 35 ns X1 to CLK t3232 X1 to CLK t33See figure 4. TTL load 9, 10, 11 All 32 ns 1/ Unless othe

45、rwise specified, for dc test parameters, all test conditions shall be worst case conditions; VIH= 2.1 V and VIL= 0.8 V. For ac test parameters, all tests are performed using the input waveforms shown in figure 4. The following conditions also apply: All timing references are made with respect to +1.

46、5 V for TTL-level signals or to the 50 percent point between VOHand VOLfor ECL signals. ECL input rise and fall times must be 2 ns 0.2 ns between 20 percent and 80 percent points. TTL input rise and fall times must be 2 ns 0.2 ns between 1 V and 2 V. 2/ Measured with device in test mode while monito

47、ring output logic states. 3/ Not more than one output should be shorted at a time. Duration of the short circuit test should not exceed one second. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90527 DEFENS

48、E SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. 4/ Switching characteristics are tested during 8 bit local mode operation. “Data“ is DI0- DI7or DI8/CI3or DI9/CI2or CI0- CI1. “n“ is determined by the following: DMS TLS “n” Open 8 bit n = 1; Test mode 2 GND GND/VCC8 bit n = 10; Local/Test mode 1 Open 9 bit n = 1; Test mode 2 VCCGND/VCC9 bit n = 11; Local/Test mode 1 Open 10 bit n = 1; Test mode 2 Open or 1