DLA SMD-5962-90553 REV B-2012 MICROCIRCUIT DIGITAL HIGH SPEED CMOS 8-BIT SYNCHRONOUS BINARY DOWN COUNTER MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Correct the logic diagram in figure 3. Add notes to figure 5, switching waveforms and test circuit. Update the boilerplate to current requirements as specified in MIL-PRF-38535. Editorial changes throughout. jak 06-04-28 Thomas M. Hess B Update b

2、oilerplate paragraphs to the current MIL-PRF-38535 requirements. - LTG 12-05-17 Thomas M. Hess REV SHEET REV SHEET REV STATUS REV B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Marcia B. Kelleher DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landa

3、ndmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY Thomas J. Ricciuti APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, HIGH SPEED CMOS, 8-BIT SYNCHRONOUS BINARY DOWN COUNTER, MONOLITHIC

4、 SILICON DRAWING APPROVAL DATE 90-10-23 REVISION LEVEL B SIZE A CAGE CODE 67268 5962-90553 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E302-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90553 DLA LAND AND M

5、ARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The compl

6、ete PIN is as shown in the following example: 5962-90553 01 E A Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54HC40103 8-bit sy

7、nchronous binary down counter 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appen

8、dix A. 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) . -0.5 V dc to +7.0 V dc DC input voltage range (VIN) . -0.5 V dc to VCC + 0.5 V dc DC output voltage range (VOUT) -0.5 V dc to VCC+ 0.5 V dc DC input diode current (IIK) . 20 mA DC output diode current (per pin) (IOK) 20 mA DC

9、 drain current (per pin) (IOUT) 25 mA DC VCCor GND current (ICC, IGND) 50 mA Storage temperature range (TSTG) -65C to +150C Maximum power dissipation (PD) 500 mW 4/ Lead temperature (soldering, 10 seconds) . +300C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) .

10、 +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) . +2.0 V dc to +6.0 V dc Input voltage range (VIN) . 0.0 V to VCC Output voltage range (VOUT) 0.0 V to VCCCase operating temperature range (TC) -55C to +125C Input rise or fall time (tr, tf): VCC= 2.0 V 0 to 1000 ns VCC= 4.5 V 0

11、 to 500 ns VCC= 6.0 V 0 to 400 ns Maximum CP frequency (fMAX): TC= +25C, VCC= 4.5 V dc . 15 MHz TC= -55C to +125C, VCC= 4.5 V dc . 10 MHz _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and aff

12、ect reliability. 2/ Unless otherwise specified, all voltages are referenced to ground. 3/ The limits for the parameters specified herein shall apply over the full specified VCCrange and case temperature range of -55C to +125C. 4/ For TA= +100C to +125C, derate linearly at 8 mW/C Provided by IHSNot f

13、or ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90553 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions Continued. Minimum pulse width, CP (tW1):

14、TC= +25C, VCC= 4.5 V dc . 33 ns TC= -55C to +125C, VCC= 4.5 V dc . 50 ns Minimum pulse width, PL, MR (tW2): TC= +25C, VCC= 4.5 V dc . 25 ns TC= -55C to +125C, VCC= 4.5 V dc . 38 ns Minimum removal time, MR to CP (trem): TC= +25C, VCC= 4.5 V dc . 10 ns TC= -55C to +125C, VCC= 4.5 V dc . 15 ns Minimum

15、 setup time, Pn to CP (ts1): TC= +25C, VCC= 4.5 V dc . 20 ns TC= -55C to +125C, VCC= 4.5 V dc . 30 ns Minimum setup time, PE to CP (ts2): TC= +25C, VCC= 4.5 V dc . 15 ns TC= -55C to +125C, VCC= 4.5 V dc . 22 ns Minimum setup time, TE to CP (ts3): TC= +25C, VCC= 4.5 V dc . 30 ns TC= -55C to +125C, VC

16、C= 4.5 V dc . 45 ns Minimum hold time, Pn to CP (th1): TC= +25C, VCC= 4.5 V dc . 5 ns TC= -55C to +125C, VCC= 4.5 V dc . 5 ns Minimum hold time, PE to CP (th2): TC= +25C, VCC= 4.5 V dc . 2 ns TC= -55C to +125C, VCC= 4.5 V dc . 2 ns Minimum hold time, TE to CP (th3): TC= +25C, VCC= 4.5 V dc . 0 ns TC

17、= -55C to +125C, VCC= 4.5 V dc . 0 ns 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those

18、cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outl

19、ines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue,

20、Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents cited in the solicitation or contract. JEDEC SOLID STATE TECHNOLOGY ASSOCIATION

21、 (JEDEC) JEDEC Standard No. 7 - Standard for Description of 54/74HCXXXXX and 54/74HCTXXXXX Advanced High-Speed CMOS Devices. (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10thStreet, Suite 240-S Arlington, VA 22201

22、). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90553 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 2.3 Order of precedence. In the event of a conflict betw

23、een the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirement

24、s shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certifi

25、cation to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. The

26、se modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physica

27、l dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3

28、Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Timing diagram. The timing diagram shall be as specified on figure 4. 3.2.6 Switching waveforms and test circuit. The switching waveforms and test circuit s

29、hall be as specified on figure 5. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical tes

30、t requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may

31、 also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in

32、 compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufactu

33、rer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appen

34、dix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime -VA shall b

35、e required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made availab

36、le onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90553 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electric

37、al performance characteristics. Test Symbol Test conditions 1/ -55C TC +125C unless otherwise specified VCCGroup A subgroups Limits Unit Min Max High level output voltage VOHVIN= VIHminimum or VILmaximum IOH= -20 A 2.0 V 1, 2, 3 1.9 V 4.5 V 4.4 6.0 V 5.9 VIN= VIHminimum or VILmaximum IOH= -4.0 mA 4.

38、5 V 3.7 VIN= VIHminimum or VILmaximum IOH= -5.2 mA 6.0 V 5.2 Low level output voltage VOLVIN= VIHminimum or VILmaximum IOL= +20 A 2.0 V 1, 2, 3 0.1 V 4.5 V 0.1 6.0 V 0.1 VIN= VIHminimum or VILmaximum IOL= +4.0 mA 4.5 V 0.4 VIN= VIHminimum or VILmaximum IOL= +5.2 mA 6.0 V 0.4 High level output voltag

39、e VIH2/ 2.0 V 1, 2, 3 1.5 V 4.5 V 3.15 6.0 V 4.2 Low level input voltage VIL2/ 2.0 V 1, 2, 3 0.3 V 4.5 V 0.9 6.0 V 1.2 Quiescent supply current (standby) ICCVIN= VCCor GND IOUT= 0 A 6.0 V 1, 2, 3 160 A Input leakage current IINVIN= VCCor GND 6.0 V 1, 2, 3 1.0 A Input capacitance CINSee 4.3.1c 4 10 p

40、F Functional tests See 4.3.1d 7, 8 Propagation delay time, CP to TC (synchronous preset) tPLH1, tPHL13/ CL= 50 pF See figure 5 2.0 V 9 300 ns 10, 11 450 4.5 V 9 60 ns 10, 11 90 6.0 V 9 51 ns 10, 11 77 Propagation delay time, CP to TC (asynchronous preset) tPLH2, tPHL23/ CL= 50 pF See figure 5 2.0 V

41、9 300 ns 10, 11 450 4.5 V 9 60 ns 10, 11 90 6.0 V 9 51 ns 10, 11 77 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90553 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISIO

42、N LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Test conditions 1/ -55C TC +125C unless otherwise specified VCCGroup A subgroups Limits Unit Min Max Propagation delay time, TE to TC tPLH3, tPHL33/ CL= 50 pF See figure 5 2.0 V 9 200 ns 10

43、, 11 300 4.5 V 9 40 ns 10, 11 60 6.0 V 9 34 ns 10, 11 51 Propagation delay time, PL to TC tPLH4, tPHL44/ CL= 50 pF See figure 5 2.0 V 9 275 ns 10, 11 415 4.5 V 9 55 ns 10, 11 83 6.0 V 9 47 ns 10, 11 71 Propagation delay time, MR to TC tPLH5, tPHL53/ CL= 50 pF See figure 5 2.0 V 9 275 ns 10, 11 415 4

44、.5 V 9 55 ns 10, 11 83 6.0 V 9 47 ns 10, 11 71 Output transition time tTLH, tTHL5/ CL= 50 pF See figure 5 2.0 V 9 75 ns 10, 11 110 4.5 V 9 15 ns 10, 11 22 6.0 V 9 13 ns 10, 11 19 1/ For power supply of 5 V 10%, the worst case output voltages (VOHand VOL) occur for HC at 4.5 V. Thus, the 4.5 V values

45、 should be used when designing with this supply. Worst cases VIHand VILoccur at VCC= 5.5 V and 4.5 V, respectively. 2/ The VIHand VILtests are not required, and shall be applied as forcing functions for the VOHor VOLtests. 3/ This parameter is guaranteed, if not tested, to the limits specified in ta

46、ble I. 4/ AC testing at VCC= 2.0 V and VCC= 6.0 V shall be guaranteed, if not tested, to the limits specified in table I. 5/ Transition time (tTLH, tTHL), if not tested, shall be guaranteed to the specified limits. Provided by IHSNot for ResaleNo reproduction or networking permitted without license

47、from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90553 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 Device type 01 Case outline E Terminal number Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 CP MR TE P0 P1 P2 P3 GND PL P4 P5 P6 P7 TC

48、PE VCCFIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90553 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 Inputs Preset mode Action MR PL PE TE H H H H Synchronous Inhibit counter H H H L Count down H H L X Preset on next positive clock transition H L X X Asynchronous Preset asynchronously L X X X Clear to maximum count NOTES: 1. L = Low voltage lev