DLA SMD-5962-90564 REV E-2013 MICROCIRCUIT DIGITAL CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER WITH 16K BYTES OF EPROM PROGRAM MEMORY MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add device types 03 and 04. Add case outline M. Add VIL2and VIH2to table I. Add block diagram for device types 03 and 04. Editorial changes throughout. 92-07-09 Monica L. Poelking B Add new programming configuration to figure 7. Changes to table

2、I. Editorial changes throughout. 93-04-19 Monica L. Poelking C Add device types 05 and 06. Editorial changes throughout. 94-09-14 Monica L. Poelking D Update boilerplate to MIL-PRF-38535 requirements. - CFS 06-05-17 Thomas M. Hess E Update boilerplate to current MIL-PRF-38535 requirements. - PHN 13-

3、07-17 Thomas M. Hess REV SHEET REV E E E E E E E E E E E E SHEET 15 16 17 18 19 20 21 22 23 24 25 26 REV STATUS REV E E E E E E E E E E E E E E OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Jeffery Tunstall DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmari

4、time.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Thomas M. Hess THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, CHMOS, SINGLE-CHIP, 8-BIT MICROCONTROLLER WITH 16K BYTES OF AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE

5、91-20-11 EPROM PROGRAM MEMORY, MONOLITHIC SILICON AMSC N/A REVISION LEVEL SIZE A CAGE CODE 67268 5962-90564 E SHEET 1 OF 26 DSCC FORM 2233 APR 97 5962-E482-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-9

6、0564 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Numb

7、er (PIN). The complete PIN is as shown in the following example: 5962-90564 01 M X Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01

8、 87C51FB-12 High performance CHMOS single-chip 8-bit microcontroller 02 87C51FB-16 High performance CHMOS single-chip 8-bit microcontroller 03 87C654 High performance CHMOS single-chip 8-bit microcontroller 04 87C654-16 High performance CHMOS single-chip 8-bit microcontroller 05 87C654 High performa

9、nce CHMOS single-chip 8-bit microcontroller with 16K bytes of one time programmable EPROM memory (3.5 to 12 MHz) 06 87C654-16 High performance CHMOS single-chip 8-bit microcontroller with 16K bytes of one time programmable EPROM memory (3.5 to 16 MHz) 1.2.2 Case outline(s). The case outline(s) are a

10、s designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style M GQCC1-J44 or CQCC2-J44 44 “J” lead chip carrier 1/ T See figure 1 44 “J” lead chip carrier 1/ U CQCC1-N44 44 Square leadless chip carrier 1/ X GDIP1-T40 or CDIP2-T40 40 Dual-in-line 1/ Z See

11、figure 1 44 Gullwing lead chip carrier 1/ 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Storage temperature range . -65C to +150C Voltage on EA/VPPpin to VSSrange 0 V to +13.0 V Voltage on any other pin to VSSrange . -0.5 V to +6.5 V M

12、aximum IOLper I/O pin 15 mA Maximum power dissipation (PD) 1.5 W 2/ Lead temperature (soldering, 10 seconds) +265C Thermal resistance, junction-to-case (JC): Cases M, U, and X . See MIL-STD-1835 Cases T and Z . 14C/W Data retention 10 years _ 1/ For device types 01, 02, 03, and 04, lid shall be tran

13、sparent to permit ultraviolet light erasure. 2/ Based on package heat transfer limitations, not device power consumption. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90564 DLA LAND AND MARITIME COLUMBUS,

14、OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. Supply voltage (VCC) . 4.5 V dc to 5.5 V dc Case operating temperature range (TC) -55C to +125C 3/ 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specif

15、ication, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Spe

16、cification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings

17、. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the tex

18、t of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be

19、in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to M

20、IL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifica

21、tions shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimension

22、s. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.

23、2.3 Block diagram. The functional block diagram shall be as specified on figure 3. 3.2.4 Timing waveforms and test circuit. The timing waveforms and test circuit shall be as specified on figure 4. _ 3/ Case temperatures are “instant on”. Provided by IHSNot for ResaleNo reproduction or networking per

24、mitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90564 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics

25、 are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be

26、 in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not m

27、arking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-

28、38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritim

29、e-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided w

30、ith each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritime s agent, and the acquiring act

31、ivity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.9.1 Processing EPROMS. All testing requirements and verification provisions herein shall be satisfied by the man

32、ufacturer prior to delivery. 3.9.2 Erasure of EPROMS. When specified, devices shall be erased in accordance with the procedures and characteristics specified in 4.4 herein. 3.9.3 Programmability of EPROMS. When specified, devices shall be programmed to the specified pattern using the procedures and

33、characteristics specified in 4.5 and table III herein. 3.9.4 Verification of erasure of programmability of EPROMS. When specified, devices shall be verified as either programmed to the specified pattern or erased. As a minimum, verification shall consist of performing a functional test (subgroup 7)

34、to verify that all bits are in the proper state. Any bit that does not verify to be in the proper state shall constitute a device failure, and shall be removed from the lot. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWIN

35、G SIZE A 5962-90564 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C 4.5 V dc VCC 5.5 V dc unless otherwise specified Group A subgroups Device type Limits Unit Min Max

36、Input low voltage VIL1/ 1, 2, 3 All 0.5 2/ 0.2VCC- 0.1 V Input low voltage EA VIL11/ 1, 2, 3 03, 04, 05, 06 0 2/ 0.2VCC- 0.45 V Input low voltage to P1.6/SCL, P1.7/SDA VIL21/ 1, 2, 3 03, 04, 05, 06 0.5 0.3VCCV Input high voltage (except XTAL1, RST) VIH1/ 1, 2, 3 All 0.2VCC+ 0.9 VCC+ 0.5 2/ V Input h

37、igh voltage (XTAL1, RST) VIH11/ 1, 2, 3 All 0.7VCCVCC+ 0.5 2/ V Input high voltage to P1.6/SCL, P1.7/SDA VIH21/ 1, 2, 3 03, 04, 05, 06 0.7VCC6.0 V Output low voltage (ports 1, 2, and 3) 3/ VOLIOL= 100 A, VCC= 4.5 V 1, 2, 3 All 0.3 V IOL= 1.6 mA 0.45 IOL= 3.5 mA 4/ 1.0 Output low voltage (port 0, ALE

38、, PSEN) 3/ VOL1IOL= 200 A, VCC= 4.5 V 1, 2, 3 All 0.3 V IOL= 3.2 mA 0.45 IOL= 7.0 mA 4/ 1.0 Output high voltage (ports 1, 2, and 3) (except P1.6 and P1.7) 3/ VOHIOH= -10 A, VCC= 4.5 V 1, 2, 3 All VCC - 0.3 V IOH= -30 A VCC - 0.7 IOH= -60 A VCC 1.5 Output high voltage (port 0 in external bus mode, AL

39、E, PSEN) VOH1IOH= -200 A, VCC= 4.5 V 1, 2, 3 All VCC - 0.3 V IOH= -3.2 mA 5/ VCC- 0.7 IOH= -7.0 mA VCC 1.5 Logical 0 input current (ports 1, 2, and 3) IILVI= 0.45 V 1, 2, 3 All -75 A Input leakage current (port 0) ILI0.45 1 s). (4) Perform dynamic burn-in (see 4.2a). (5) Margin at VM= 5.9 V. (6) Per

40、form electrical tests (see 4.2). (7) Erase (see 3.9.2), except devices submitted for groups A, B, C, and D testing. (8) Verify erasure (see 3.9.4). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90564 DLA LA

41、ND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 21 DSCC FORM 2234 APR 97 Margin test method B. (1) Program at +25C, 100 percent of the bits. (2) Bake, unbiased, for 24 hours at +250C. (3) Perform margin test at VM= +5.2 V. (4) Erase (see 3.9.2). (5) Perform interim electrical tests

42、in accordance with table II. (6) For device types 01 to 04, program 100 percent of the bits and verify (see 3.9.3). (7) Perform burn-in (see 4.2a). (8) One-hundred percent test at +25C (group A, subgroups 1 and 7). VM= 5.2 V with loose timing, apply PDA, for device types 05 and 06, the virgin state

43、of the device must be verified. (9) Perform remaining final electrical subgroups and group A testing. (10) For device types 01, 02, 03, and 04, erase, devices may be submitted for groups B, C, and D at this time. (11) For device types 01, 02, 03, and 04, verify erasure (see 3.9.4). Steps 1 through 4

44、 are performed at wafer level. (12) Steps 1 through 4 are performed at wafer level. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90564 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET

45、 22 DSCC FORM 2234 APR 97 TABLE III. Programming characteristics. Parameter Symbol Conditions Group A subgroups Device type Limits Unit Min Max Programming supply voltage VPPEPROM programming and verification characteristics. TA= +21C to +27C VCC= +5 V 0.5 V VSS= 0 V See figures 5 and 6. All 12.5 13

46、.0 V Programming supply current IPPAll 75 mA Oscillator frequency 1/tCLCLAll 4 6 MHz Address setup to PROG low 1/ tAVGLAll 48tCLCLs Address hold after PROG 1/ tGHAXAll 48tCLCLs Data setup to PROG low 1/ tDVGLAll 48tCLCLs Data hold after PROG 1/ tGHDXAll 48tCLCLs P2.7 (enable) high to VPP1/ tEHSHAll

47、48tCLCLs VPPsetup to PROG low 1/ tSHGLAll 10 s VPPhold after PROG 1/ tGHGHAll 10 s PROG width tGLGHAll 90 110 s Address to data valid 1/ tAVQVAll 48tCLCLs Enable low to data valid 1/ tELQVAll 48tCLCLs Data float after enable 1/ tEHQZAll 0 48tCLCLs PROG high to PROG low 1/ tGHGLAll 10 s 1/ Guaranteed

48、 to the limits specified in table III, if not tested. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90564 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 23 DSCC FORM 2234 APR 97 FIGURE 5. EPROM programming and verification waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90564 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION