DLA SMD-5962-90613 REV A-2012 MICROCIRCUIT DIGITAL HIGH SPEED CMOS 3-LINE TO 8-LINE DECODER DEMULTIPLEXER WITH ADDRESS LATCHES TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

1、 - REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update the boilerplate to current requirements as specified in MIL-PRF-38535. Editorial changes throughout jak. 12-04-03 Thomas M. Hess REV SHEET REV SHEET REV STATUS REV A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PR

2、EPARED BY Marcia B Kelleher DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Thomas J. Ricciuti THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, HIGH SPEED CMOS, 3-LINE TO

3、 8-LINE DECODER/DEMULTIPLEXER, WITH ADDRESS LATCHES, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 90-08-08 AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-90613 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E100-12 Provided by IHSNot for

4、ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90613 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 com

5、pliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-90613 01 E A Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Devic

6、e type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54HCT237 3-line to 8-line decoder/demultiplexer, with address latches, TTL compatible inputs 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as foll

7、ows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line F GDFP1-F16 or CDFP2-F16 16 flat pack 2 CQCC1-N20 20 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings.

8、 1/ 2/ Supply voltage range -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC + 0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc Input diode current (IIK) 20 mA DC output diode current (per pin) (IOK) 20 mA DC drain current (per pin) (IDRAIN) 25 mA DC VCCor GND

9、 current (per pin) (ICC, IGND) . 50 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD) . 500 mW 3/ Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating con

10、ditions. 2/ Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Input voltage range (VIN) +0.0 V dc to VCCOutput voltage range (VOUT). +0.0 V dc to VCCCase operating temperature range (TC) . -55C to +125C Input rise or fall time (tr, tf): VCC= 4.5 V . 0 to 500 ns Minimum pulse width, LE (tw): TC= +25C

11、, VCC= 4.5 V 16 ns TC= -55C to +125C, VCC= 4.5 V 24 ns Minimum seup time, An to LE (ts): TC= +25C, VCC= 4.5 V 15 ns TC= -55C to +125C, VCC= 4.5 V 22 ns Minimum hold time, An to LE (th): TC= +25C, VCC= 4.5 V 5 ns TC= -55C to +125C, VCC= 4.5 V 5 ns 1/ Stresses above the absolute maximum rating may cau

12、se permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless other wise specified, all voltages are referenced to ground. 3/ For TC= +100C to +125C, derate linearly at 11 mW/C. Provided by IHSNot for ResaleNo reproduction or ne

13、tworking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90613 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification,

14、standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specificatio

15、n for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies

16、 of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references

17、cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, app

18、endix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML

19、product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or

20、function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and phys

21、ical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as speci

22、fied on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license fro

23、m IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90613 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table

24、 I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PR

25、F-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the

26、device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the

27、 QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as

28、an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcirc

29、uits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritime s agent, and the acquiring activity retain the option

30、to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 596

31、2-90613 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TC +125C unless otherwise specified VCCGroup A subgroups Limits Unit Min Max High level output voltage VOHVIN= 2.0 V

32、or 0.8 V IOH = -20 A 4.5 V 1, 2, 3 4.4 V IOH= -4 mA 3.7 Low level output voltage VOLVIN= 2.0 V or 0.8 V IOL= +20 A 4.5 V 1, 2, 3 0.1 V IOL= +4 mA 0.4 High level input voltage VIH2/ 4.5 V 1, 2, 3 2.0 V Low level input voltage VIL2/ 4.5 V 1, 2, 3 0.8 V Input capacitance CINVIN= 0 V, see 4.3.1c, TC= +2

33、5C 4 10 pF Quiescent supply current ICCVIN= VCCor GND, IOUT= 0.0 A 5.5 V 1, 2, 3 160 A Input leakage current IINVIN= VCCor GND 5.5 V 1, 2, 3 1.0 A Functional tests See 4.3.1d 7, 8 Additional quiescent supply current ICCAny one input, VIN = 2.4 V Other inputs, VIN= VCCor GND IOUT= 0.0 A 5.5 V 1, 2, 3

34、 3.0 mA Propagation delay time, An to Yn tPHL1, tPLH1CL= 50 pF See figure 4 4.5 V 9 38 ns 10, 11 57 Propagation delay time, OE1 to Yn tPHL2, tPLH24.5 V 9 29 ns 10, 11 44 Propagation delay time, OE0 to Yn tPHL3, tPLH34.5 V 9 29 ns 10, 11 44 Propagation delay time, LE to Yn tPHL4, tPLH44.5 V 9 42 ns 1

35、0, 11 63 Output transition time tTLH, tTHL3/ 4.5 V 9 15 ns 10, 11 22 1/ For power supply of 5 V 10 percent, the worst case output voltages (VOHand VOL) occur for HCT at 4.5 V. Thus, the 4.5 V values should be used when designing with this supply. Worst cases VIHand VILoccur at VCC= 5.5 V and 4.5 V,

36、respectively. 2/ VIHand VILtests are guaranteed if not tested but shall be applied as forcing functions for VOHor VOLtests. 3/ Transition times (tTLH, tTHL), if not tested, shall be guaranteed to the specified limits in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted wi

37、thout license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90613 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 Device type 01 Case outlines E, F 2 Terminal number Terminal symbol Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 1

38、9 20 A0 A1 A2 LE OE1 OE0 Y7 GND Y6 Y5 Y4 Y3 Y2 Y1 Y0 VCC - - - - - - - - - - - - NC A0 A1 A2 LE NC OE1 OE0 Y7 GND NC Y6 Y5 Y4 Y3 NC Y2 Y1 Y0 VCCNC = No connection FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDAR

39、D MICROCIRCUIT DRAWING SIZE A 5962-90613 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 Inputs Outputs Enable Select LE OE0 OE1 A2 A1 A0 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 X X H X X X L L L L L L L L X L X X X X L L L L L L L L L X L L L L H L L L L L L L L H L L

40、 L H L H L L L L L L L H L L H L L L H L L L L L L H L L H H L L L H L L L L L H L H L L L L L L H L L L L H L H L H L L L L L H L L L H L H H L L L L L L L H L L H L H H H L L L L L L L H H H L X X X * * * * * * * * L = Low voltage level H = High voltage level X = Irrelevant * = Depends upon the ad

41、dress previously applied while LE was at a logic low. FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90613 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 8 DSCC

42、 FORM 2234 APR 97 FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90613 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 9 DSCC FORM 2234 APR 97 NOTES: 1. CL= 50

43、 pF or equivalent, includes test jig and probe capacitance. 2. Input signal from pulse generator: VIN= 0.0 V to 3.0 V; PRR 1 MHz; ZO= 50; tr= 6.0 ns; tf= 6.0 ns; trand tfshall be measured from 0.3 V to 2.7 V and from 2.7 V to 0.3 V, respectively; duty cycle = 50 percent. 3. The outputs are measured

44、one at a time with one transition per measurement. FIGURE 4. Switching waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90613 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISIO

45、N LEVEL A SHEET 10 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior

46、 to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparin

47、g or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified

48、 in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. TABLE II. Electrical test requirements. MIL-STD-883 test requirements Subgroups (in accordance with MIL-STD-883, method 5005, table I) Interim electrical parameters (method 5004) - - - Final electrical test parameters (method 5004) 1*, 2, 3, 7, 8, 9 Group A test requirements (method 5005) 1, 2, 3, 4, 7, 8, 9, 10*, 11* Groups C and