ImageVerifierCode 换一换
格式:PDF , 页数:11 ,大小:154.48KB ,
资源ID:699784      下载积分:10000 积分
快捷下载
登录下载
邮箱/手机:
温馨提示:
如需开发票,请勿充值!快捷下载时,用户名和密码都是您填写的邮箱或者手机号,方便查询和重复下载(系统自动生成)。
如填写123,账号就是123,密码也是123。
特别说明:
请自助下载,系统不会自动发送文件的哦; 如果您已付费,想二次下载,请登录后访问:我的下载记录
支付方式: 支付宝扫码支付 微信扫码支付   
注意:如需开发票,请勿充值!
验证码:   换一换

加入VIP,免费下载
 

温馨提示:由于个人手机设置不同,如果发现不能下载,请复制以下地址【http://www.mydoc123.com/d-699784.html】到电脑端继续下载(重复下载不扣费)。

已注册用户请登录:
账号:
密码:
验证码:   换一换
  忘记密码?
三方登录: 微信登录  

下载须知

1: 本站所有资源如无特殊说明,都需要本地电脑安装OFFICE2007和PDF阅读器。
2: 试题试卷类文档,如果标题没有明确说明有答案则都视为没有答案,请知晓。
3: 文件的所有权益归上传用户所有。
4. 未经权益所有人同意不得将文件中的内容挪作商业或盈利用途。
5. 本站仅提供交流平台,并不能对任何下载内容负责。
6. 下载文件中如有侵权或不适当内容,请与我们联系,我们立即纠正。
7. 本站不保证下载资源的准确性、安全性和完整性, 同时也不承担用户因使用这些下载资源对自己和他人造成任何形式的伤害或损失。

版权提示 | 免责声明

本文(DLA SMD-5962-90616 REV B-2012 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED LOW-POWER SCHOTTKY TTL 10-BIT BUS INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS MONOLITHIC SILICON.pdf)为本站会员(fatcommittee260)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-90616 REV B-2012 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED LOW-POWER SCHOTTKY TTL 10-BIT BUS INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update to reflect latest changes in format and requirements. Editorial changes throughout. -les 04-08-25 Raymond Monnin B Update drawing as part of 5 year review. -jt 12-06-25 C. SAFFLE THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. R

2、EV SHEET REV SHEET REV STATUS REV B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY Larry T. Gauder DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGE

3、NCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY Tim H. Noh APPROVED BY William K. Heckman MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED LOW-POWER SCHOTTKY, TTL, 10-BIT BUS INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS, MONOLITHIC SILICON DRAWING APPROVAL DATE 90-05-15 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE

4、 67268 5962-90616 SHEET 1 OF 10 DSCC FORM 2233 APR 97 5962-E340-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90616 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234

5、 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-90616 01 L A Drawing n

6、umber Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type. The device type identifies the circuit function as follows: Device type Generic number Circuit function 01 54ALS29821 10-bit bus interface flip-flops with 3-state outputs 1.2.2 Case outlines. The case o

7、utlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style L GDIP3-T24 or CDIP4-T24 24 dual-in-line 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage (VCC) -0.5 V

8、dc to +7.0 V dc Input voltage range . -1.2 V dc at 18 mA to +5.5 V dc Voltage applied to a disabled 3-state output . -0.5 V dc to +5.5 V dc Storage temperature range -65C to +150C Continuous power dissipation (PD) 632.5 mW 1/ Lead temperature (soldering, 10 seconds) +300C Junction temperature (TJ) +

9、175C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc minimum to +5.5 V dc maximum Minimum high level input voltage (VIH) . 2.0 V dc Maximum low level input voltage (VIL) . 0.8 V dc Maximum high level output curre

10、nt (IOH) -18 mA Maximum low level output current (IOL) 32 mA Case operating temperature range (TC) . -55C to +125C _ 1/ Maximum power dissipation is defined as VCCX ICC, and must withstand the added PDdue to short circuit output test e.g., IOS. Provided by IHSNot for ResaleNo reproduction or network

11、ing permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90616 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, stand

12、ards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for

13、. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of t

14、hese documents are available online at https:/assist.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited here

15、in, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A fo

16、r non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in

17、 accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function o

18、f the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimen

19、sions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on fi

20、gure 2. 3.2.4 Test circuit and switching waveforms. The test circuit and switching waveforms shall be as specified on figure 3. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over t

21、he full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without lic

22、ense from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90616 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In

23、addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be mar

24、ked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance

25、 shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the r

26、equirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change t

27、o DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore

28、documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90616 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC

29、 FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max High level output voltage VOHVCC= 4.5 V IOH = -12 mA 1, 2, 3 All 2.4 V IOH = -18 mA 2.0 Low level output voltage VOLVCC

30、= 4.5 V IOL = 32 mA 1, 2, 3 All 0.5 V Input clamp voltage VICVCC= 4.5 V II = -18 mA 1, 2, 3 All -1.2 V Short circuit output current IOSVCC= 5.5 V 1/ VO= 0 V 1, 2, 3 All -75 -250 mA Off-state output current IOZHVCC= 5.5 V VO= 2.4 V 50 A IOZLVO= 0.4 V -50 High level input current IIH1VCC= 5.5 V VI= 5.

31、5 V 1, 2, 3 All 100 A IIH2VI= 2.7 V 20 Low level input current IILVCC= 5.5 V, VI= 0.4 V 1, 2, 3 All -0.5 mA Supply current ICCVCC= 5.5 V Outputs high 1, 2, 3 All 100 mA Outputs low 105 Outputs disabled 115 Functional tests See 4.3.1c 2/ 7, 8 All Pulse duration, CLK high or low twVCC= 4.5 to 5.5 V dc

32、 9, 10, 11 All 8 ns Setup time, data before CLK tsu9, 10, 11 All 4 ns Hold time, data after CLK th9, 10, 11 All 4 ns Propagation delay time tPLH1VCC= 5.0 V CL= 50 pF 9 All 2 8.5 ns from CLK to any Q VCC= 4.5 V to 5.5 V 10, 11 2 11.5 output tPHL1VCC= 5.0 V 9 All 2 8.5 ns VCC= 4.5 V to 5.5 V 10, 11 2

33、11.5 tPLH2VCC= 5.0 V CL= 300 pF 9 All 2 14 ns VCC= 4.5 V to 5.5 V 10, 11 2 21 tPHL2VCC= 5.0 V 9 All 2 17.5 ns VCC= 4.5 V to 5.5 V 10, 11 2 21 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90616 DLA LAND AND

34、 MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max Enable time, tPZH1VCC= 5.0 V CL= 50 pF 9 A

35、ll 12 ns from OC to any Q VCC= 4.5 V to 5.5 V 10, 11 1 17 tPZL1VCC= 5.0 V 9 All 1 12.5 ns VCC= 4.5 V to 5.5 V 10, 11 1 17 tPZH2VCC= 5.0 V CL= 300 pF 9 All 1 17 ns VCC= 4.5 V to 5.5 V 10, 11 1 25 tPZL2VCC= 5.0 V 9 All 1 23 ns VCC= 4.5 V to 5.5 V 10, 11 1 29.5 Disable time, tPHZ1VCC= 5.0 V CL= 50 pF 9

36、 All 1 11 ns from OC to any Q VCC= 4.5 V to 5.5 V 10, 11 1 16 tPLZ1VCC= 5.0 V 9 All 1 9 ns VCC= 4.5 V to 5.5 V 10, 11 1 14 tPHZ2VCC= 5.0 V CL= 5 pF 9 All 1 9 ns VCC= 4.5 V to 5.5 V 10, 11 1 12 tPLZ2VCC= 5.0 V 9 All 1 8 ns VCC= 4.5 V to 5.5 V 10, 11 1 11 1/ Not more than one output will be tested at

37、one time and the duration of the test condition shall not exceed one second. 2/ Functional test shall be conducted at input test conditions of GND VIL VOLand VOH VIH VCC. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING S

38、IZE A 5962-90616 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 Device type 01 Case outlines L Terminal number Terminal symbol 1 OC 2 1D 3 2D 4 3D 5 4D 6 5D 7 6D 8 7D 9 8D 10 9D 11 10D 12 GND 13 CLK 14 10Q 15 9Q 16 8Q 17 7Q 18 6Q 19 5Q 20 4Q 21 3Q 22 2

39、Q 23 1Q 24 VCCFIGURE 1. Terminal connections. Inputs Output OC CLK D Q L H L L L H L L X Q0H X X Z H = High level voltage L = Low level voltage = Transition from low to high Q = Level of Q before the indicated steady-state input conditions were established X = Dont care FIGURE 2. Truth table. Provid

40、ed by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90616 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 NOTES: 1. CLincludes probe and jig capacitance. 2. Input pulses a

41、re supplied by generators having the following characteristics: PRR 10 MHz, Z0= 50 , tr= tf= 2.5 ns. 3. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. FIGURE 3. Test circuit and switching waveforms. Provided by IHSNot for

42、ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90616 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 9 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures sh

43、all be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-

44、883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as

45、 applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manuf

46、acturer. TABLE II. Electrical test requirements. MIL-STD-883 test requirements Subgroups (in accordance with MIL-STD-883, method 5005, table I) Interim electrical parameters (method 5004) - - - Final electrical test parameters (method 5004) 1*, 2, 3, 7, 8, 9, 10, 11 Group A test requirements (method

47、 5005) 1, 2, 3, 7, 8, 9, 10, 11 Groups C and D end-point electrical parameters (method 5005) 1, 2, 3 * PDA applies to subgroup 1. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The

48、 following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 4, 5, and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroups 7 and 8 shall include verification of the truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90616 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISIO

copyright@ 2008-2019 麦多课文库(www.mydoc123.com)网站版权所有
备案/许可证编号:苏ICP备17064731号-1