DLA SMD-5962-90657 REV B-2013 MICROCIRCUIT DIGITAL CMOS UNIVERSAL SERIAL CONTROLLER MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update boilerplate to MIL-PRF-38535 requirements. - CFS 06-06-15 Thomas M. Hess B Update boilerplate to current MIL-PRF-38535 requirements. - PHN 13-07-17 Thomas M. Hess REV B B B B B B SHEET 35 36 37 38 39 40 REV B B B B B B B B B B B B B B B B

2、B B B B SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED Thomas M. Hess DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCU

3、IT DRAWING CHECKED BY Thomas M. Hess THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, CMOS, UNIVERSAL AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 93-05-19 SERIAL CONTROLLER, MONOLITHIC SILICON AMSC N/A REVISION LEVEL SIZE

4、A CAGE CODE 67268 5962-90657 B SHEET 1 OF 40 DSCC FORM 2233 APR 97 5962-E483-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90657 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 D

5、SCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Nu

6、mber (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 90657 01 M X A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outli

7、ne (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A s

8、pecified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 16C30 Universal serial controller 1.2.3 Device class design

9、ator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, app

10、endix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X CMGA3-P68 68 Pin grid array 1.2.5 Lead finish. The lead finish is as specified

11、in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90657 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVE

12、L B SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) -0.3 V to +7.0 V dc Voltages on all pins with respect to VSS(except VCC) . -0.3 V dc to VCC+ 0.3 V dc Power dissipation (PD) . 350 mW Lead temperature (soldering, 10 seconds) . +270C Thermal resistance, jun

13、ction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) . +145C Storage temperature range -65C to +150C 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Ambient operating temperature range (TA) -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specif

14、ication, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-

15、38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit

16、Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094). 2.2 Order of

17、 precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. _ 1/ Stresses above the ab

18、solute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90657 D

19、LA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturer

20、s Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 De

21、sign, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline. The case outline shall be in accordance with 1.2

22、.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Block diagram. The block diagram shall be as specified on figure 2. 3.2.4 Timing waveforms and test circuit. The timing waveforms and test circuit shall be as specified on figure 3. 3.3 Electrica

23、l performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test re

24、quirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where

25、 marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PR

26、F-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in

27、 MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall b

28、e required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product m

29、eets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M i

30、n MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DLA Land and Maritime -VA of change of product (see 6.2 herein) involving devices acquired to this drawing is req

31、uired for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore d

32、ocumentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number xxx (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or

33、 networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90657 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. See footnotes at end of table. Test Symbol Conditions 1/

34、-55C TA +125C, 4.5 V VCC 5.5 V unless otherwise specified Group A subgroups Device types Limits Unit Min Max Input high voltage VIH1, 2, 3 All 2.2 VCC+ 0.3 V Input low voltage VIL-0.3 0.8 V Output high voltage VOH1IOH= -1.6 mA, VCC= 4.5 V 2.4 V Output high voltage VOH2IOH= -250 A, VCC= 4.5 V VCC 0.8

35、 V Output low voltage VOLIOL= +2 mA, VCC= 4.5 V 0.4 V Input leakage current IIL0.4 V VIN 2.4 V VCC= 5.5 V 10 A Output leakage current IOL0.4 V VIN 2.4 V VCC= 5.5 V 10 A VCCsupply current ICCIVCC= 5.0 V VIH= 4.8 V, VIL= -0.2 V 50 mA Input capacitance CINSee 4.4.1.c 4 All 10 pF Output capacitance COUT

36、See 4.4.1.c 15 pF Bidirectional capacitance CI/OSee 4.4.1.c 20 pF Functional testing See 4.4.1.b 7, 8 All Bus cycle time 1 VCC= 4.5 V See figure 3. 9, 10, 11 All 160 ns AS low width 2 40 ns AS high width 3 90 ns DS low width 4 70 ns DS high width 5 60 ns AS to DS delay time 6 5 ns DS to AS delay tim

37、e 7 5 ns Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90657 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics -

38、Continued. See footnotes at end of table. Test Symbol Conditions 1/ -55C TA +125C, 4.5 V VCC 5.5 V unless otherwise specified Group A subgroups Device types Limits Unit Min Max DS to data active delay 8 VCC= 4.5 V See figure 3. 9, 10, 11 All 0 ns DS to data valid delay 9 85 ns DS to data not valid d

39、elay 10 0 ns DS to data float delay 11 20 ns CS to AS setup time 12 15 ns CS to AS hold time 13 0 ns Direct address to AS setup time 2/ 14 15 ns Direct address to AS hold time 2/ 15 5 ns SITACK to AS setup time 16 15 ns SITACK to AS hold time 17 5 ns Address to AS setup time 18 15 ns Address to AS h

40、old time 19 5 ns R/W to DS setup time 20 0 ns R/W to DS hold time 21 25 ns DS to RxREQ inactive delay 3/ 22 60 ns DS to RxREQ active delay 23 0 ns Write data to DS setup time 24 30 ns Write data to DS hold time 25 0 ns Provided by IHSNot for ResaleNo reproduction or networking permitted without lice

41、nse from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90657 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. See footnotes at end of table. Test Symbol Conditions 1/ -55C TA +125C, 4.5 V V

42、CC 5.5 V unless otherwise specified Group A subgroups Device types Limits Unit Min Max DS to TxREQ inactive delay 4/ 26 VCC= 4.5 V See figure 3. 9, 10, 11 All 70 ns DS to TxREQ active delay 27 0 ns RD low width 28 70 ns RD high width 29 60 ns AS to RD delay time 30 5 ns RD to AS delay time 31 5 ns R

43、D to data active delay 32 0 ns RD to data valid delay 33 85 ns RD to data non valid delay 34 0 ns RD to data float delay 35 20 ns RD to RxREQ inactive delay 3/ 36 60 ns RD to RxREQ active delay 37 0 ns WR low width 38 70 ns WR high width 39 60 ns AS to WR delay time 40 5 ns WR to AS delay time 41 5

44、ns Write data to WR setup time 42 30 ns Write data to WR hold time 43 0 ns WR to TxREQ inactive delay 4/ 44 70 ns Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90657 DLA LAND AND MARITIME COLUMBUS, OHIO 432

45、18-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. See footnotes at end of table. Test Symbol Conditions 1/ -55C TA +125C, 4.5 V VCC 5.5 V unless otherwise specified Group A subgroups Device types Limits Unit Min Max WR to TxREQ active

46、 delay 45 VCC= 4.5 V See figure 3. 9, 10, 11 All 0 ns CS to DS setup time 5/ 46 0 ns CS to DS hold time 5/ 47 25 ns Direct address to DS setup time 2/ 5/ 48 5 ns Direct address to DS hold time 2/ 5/ 49 25 ns SITACK to DS setup time 5/ 50 5 ns SITACK to DS hold time 5/ 51 25 ns CS to RD setup time 5/

47、 52 0 ns CS to RD hold time 5/ 53 25 ns Direct address to RD setup time 2/ 5/ 54 5 ns Direct address to RD hold time 2/ 5/ 55 25 ns SITACK to RD setup time 5/ 56 5 ns SITACK to RD hold time 5/ 57 25 ns CS to WR setup time 5/ 58 0 ns CS to WR hold time 5/ 59 25 ns Direct address to WR setup time 2/ 5

48、/ 60 5 ns Direct address to WR hold time 2/ 5/ 61 25 ns SITACK to WR setup time 5/ 62 5 ns SITACK to WR hold time 5/ 63 25 ns Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90657 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 9 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. See footnotes at end of table. Tes