DLA SMD-5962-90686 REV A-2009 MICROCIRCUIT DIGITAL ADVANCED CMOS HEX INVERTER WITH OPEN DRAIN OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update the boilerplate paragraphs to current requirements as specified in MIL-PRF-38535. - jak 09-03-25 Thomas M. Hess REV SHET REV SHET REV STATUS REV A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 PMIC N/A PREPARED BY J

2、oseph A. Kerby STANDARD MICROCIRCUIT DRAWING CHECKED BY Charles F. Saffle, Jr. DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Monica L. Poelking AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVA

3、L DATE 99-06-03 MICROCIRCUIT, DIGITAL, ADVANCED CMOS, HEX INVERTER WITH OPEN DRAIN OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-90686 SHEET 1 OF 13 DSCC FORM 2233 APR 97 5962-E194-09 Provided by IHSNot for ResaleNo reproduction or networkin

4、g permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90686 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliabilit

5、y (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is a

6、s shown in the following example: 5962 - 90686 01 Q C A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devi

7、ces meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s

8、). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ACT05 Hex inverter with open drain outputs TTL compatible inputs 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as f

9、ollows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case o

10、utline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style C GDFP1-T14 14 Dual-in-line package 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M

11、. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90686 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply vo

12、ltage range (VCC) . -0.5 V dc to +6.0 V dc DC input voltage range (VIN) . -0.5 V dc to VCC+0.5 V dc DC output voltage range (VOUT) -0.5 V dc to VCC+0.5 V dc DC input diode current (IIK) (VINVCC+0.5 V) 20 mA DC output diode current (IOK) (VOUTVCC+0.5 V) . 50 mA DC output source or sink current (IOUT)

13、 (per output pin) 50 mA DC VCCor GND current 100 mA Storage temperature range (TSTG) -65C to +150C Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) . +175C Maximum power dissipation (PD) 500 mW 1.4 Recommended opera

14、ting conditions. 2/ 3/ Supply voltage range (VCC) . +4.5 V dc to +5.5 V dc Input voltage range (VIN) . +0.0 V dc to VCCOutput voltage range (VOUT) +0.0 V dc to VCC Minimum high level input voltage (VIH) . +2.0 V Maximum low level input voltage (VIL). +0.8 V Case operating temperature range (TC) -55C

15、 to +125C Maximum Input transition rise or fall rate (t/V ) (output enabled) 10 ns/V 1/ Stresses above the absolute maximum rating may cause permanent damage to the device, Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise noted, all voltage

16、s are referenced to GND. 3/ The limits for the parameters specified herein shall apply over the full specified VCCrange and case temperature range of -55C to +125C. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A

17、5962-90686 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified

18、 herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Mi

19、crocircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicks

20、earch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this docu

21、ment, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device m

22、anufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified her

23、ein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accord

24、ance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit.

25、The switching waveforms and test circuit shall be as specified on figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90686 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEE

26、T 5 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating tempe

27、rature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN ma

28、y also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and

29、V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device c

30、lass M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M,

31、 a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manu

32、facturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or f

33、or device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is re

34、quired for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made availa

35、ble onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 36 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without lice

36、nse from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90686 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test and MIL-STD-883 test method 1/ Symbol Test conditions 2/ -55C TC+125C +4.5 V

37、VCC +5.5 V unless otherwise specified VCCGroup A subgroups Limits 3 Unit Min Max4.5 V 1, 2, 3 2.0 High level input voltage VIH5.5 V 1, 2, 3 2.0 V 4.5 V 1, 2, 3 0.8 Low level input voltage VIL5.5 V 1, 2, 3 0.8 V VIN= VIHor VILIOL= +50 A 4.5 V and 5.5V 1, 2, 3 0.10 1 0.36 VIN= VIHor VILIOL= +24 mA 4.5

38、 V and 5.5V 2, 3 0.50 Low level output voltage 3007 VOLVIN= VIHor VILIOL= +50 mA 4/ 5.5 V 1, 2, 3 1.65 V 1 4.0 Quiescent supply current 3005 ICCVIN= VCCor GND IOUT= 0.0 A 4.5 V and 5.5V 2, 3 80.0 A 1 2.4 Quiescent supply current delta, TTL input levels 3005 ICCVIN = VCC -2.1 V 4.5 V and 5.5V 2, 3 3.

39、0 mA Input capacitance 3012 CINTC= +25C See 4.4.1c 5.0 V 4 10.0 pF Power dissipation capacitance 3012 CPD5/ TC= +25C See 4.4.1c 5.0 V 4 105 pF 4.5 V 1 L H Functional tests 3014 6/ VIH= 2.0 V, VIL= 0.8 V Verify output VOUTSee 4.4.1b 5.5V 2, 3 L H Propagation delay time, output low to high impedance 3

40、003 tPLZ, 7/ 5.0 V 9, 10, 11 2.7 10.8 ns Propagation delay time, output high impedance to low 3003 tPZL, 7/ CL= 50 pF minimum RL= 500 See figure 4 5.0 V 9, 10, 11 2.3 9.3 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,

41、-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90686 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. 1/ For tests not listed in the referenced MIL-STD-883 (e.g. ICC), utilize the general

42、test procedure under the conditions listed herein. 2/ Each input/output, as applicable, shall be tested at the specified temperature for the specified limits, to the tests in table I herein. Output terminals not designated shall be high level logic, low level logic, or open, except for all ICCand IC

43、Ctests, where the output terminals shall be open. When performing these tests, the current meter shall be placed in the circuit such that all current flows through the meter. For input terminals not designated, VIN= GND or VIN 4.5 V. 3/ For negative and positive voltage and current values, the sign

44、designates the potential difference in reference to GND and the direction of current flow, respectively; and the absolute value of the magnitude, not the sign, is relative to the minimum and maximum limits, as applicable, listed herein. All devices shall meet or exceed the limits specified in table

45、I if tested at 4.5 V VCC 5.5 V. 4/ Test one output at a time for a 1 second maximum duration. Measurement is made by forcing current and measuring voltage to minimize power dissipation. Test verifies a minimum of 75 transmission line drive capability at +125C. 5/ Power dissipation capacitance (CPD)

46、determines the power consumption (PD) and the current consumption (IS). Where: PD= (CPD+ CL) (VCCx VCC)f + (ICCx VCC) + (nxdxICCxVCC) IS= (CPD+ CL)VCCf + ICC+ (nxdxICC) f is the frequency of the input signal; n is the number of device inputs at TTL levels; and d is the duty cycle of the signal, and

47、CLis the external output load capacitance. 6/ Tests shall be performed in sequence, attributes data only. Functional tests shall include the truth table and other logic patterns used for fault detection. The test vectors used to verify the truth table shall, at a minimum, test all functions of each

48、input and output. All possible input to output logic patterns per function shall be guaranteed, if not tested, to the truth table in figure 2 herein. Functional tests shall be performed in sequence as approved by the qualifying activity on qualified devices. After incorporating allowable tolerances per MIL-STD-883, VIL= 0.4 V and VIH= 2.4 V. For outputs, L 0.8 V, H 2.0 V. 7/ For propagation delay tests, all paths must be tested. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,