DLA SMD-5962-90701 REV B-2012 MICROCIRCUIT DIGITAL HIGH SPEED CMOS DUAL J-K FLIP-FLOP WITH SET AND RESET TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add notes and redraw the switching waveforms for figure 4, switching waveforms and test circuit. Update boilerplate to MIL-PRF-38535 requirements. Editorial changes throughout. - LTG 06-01-31 Thomas M. Hess B Correct output current condition for

2、VOHand VOLtests in table I. Update boilerplate to MIL-PRF-38535 requirements. Editorial changes throughout. jak 12-02-23 Thomas M. Hess REV SHEET REV SHEET REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Marcia B. Kelleher DLA LAND AND

3、 MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Thomas J. Riccuiti THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, HIGH SPEED CMOS, DUAL J-K FLIP-FLOP WITH SET AND RESET, TTL COMPAT

4、IBLE INPUTS, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 91-04-25 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-90701 SHEET 1 OF 14 DSCC FORM 2233 APR 97 5962-E183-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license f

5、rom IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-90701 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space a

6、pplication (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962

7、 - 90701 01 M E A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified

8、 RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the c

9、ircuit function as follows: Device type Generic number Circuit function 01 54HCT109 Dual J- Kflip-flop with set and reset, TTL compatible inputs 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requi

10、rements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MI

11、L-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for Res

12、aleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-90701 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC

13、 input voltage range (VIN) -0.5 V dc to VCC+ 0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc Clamp diode current 20 mA DC output current (per pin) 25 mA DC VCCor GND current (per pin) . 50 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD) 2/ . 50

14、0 mW Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. 3/ Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Input voltage range (VIN) 0.0 V dc to VCCOutput voltage range (V

15、OUT) 0.0 V dc to VCCCase operating temperature range (TC) . -55C to +125C Input rise or fall time (tr, tf): VCC= 4.5 V, 5.5 V 0 to 500 ns Minimum setup time, J, Kto CP (ts): TC= 25C, VCC= 4.5 V . 18 ns TC= -55C to +125C, VCC= 4.5 V . 27 ns Minimum pulse width, CP, R, S(tw): TC= 25C, VCC= 4.5 V . 18

16、ns TC= -55C to +125C, VCC= 4.5 V . 27 ns Minimum hold time, J, Kto CP (th): TC= 25C, VCC= 4.5 V . 3 ns TC= -55C to +125C, VCC= 4.5 V . 3 ns Minimum removal time, R, Sto CP (tREM): TC= 25C, VCC= 4.5 V . 18 ns TC= -55C to +125C, VCC= 4.5 V . 27 ns Maximum clock frequency, CP (fMAX): TC= 25C, VCC= 4.5

17、V . 27 MHz TC= -55C to +125C, VCC= 4.5 V . 18 MHz 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ For TC= +100C to +125C, derate linearly at 12 mW/C. 3/ Unless otherwis

18、e specified, all voltages are referenced to ground. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-90701 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 2. APPL

19、ICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPART

20、MENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDB

21、K-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.

22、2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JESD-7-A - Standard for De

23、scription of 54/74HCXXXX and 54/74HCTXXXX High-Speed CMOS Devices. (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10th Street, Suite 240S, Arlington, VA 22201.) 2.3 Order of precedence. In the event of a conflict be

24、tween the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requireme

25、nts for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements

26、for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classe

27、s Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified

28、on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS

29、-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-90701 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance character

30、istics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined

31、in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on

32、the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certificat

33、ion mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QM

34、L-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of co

35、mpliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appen

36、dix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device

37、class M. For device class M, notification to DLA Land and Maritime -VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, DLA

38、 Land and Maritime s agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device cla

39、ss M devices covered by this drawing shall be in microcircuit group number 38 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-9

40、0701 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Test conditions 1/ -55C TC +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max High level output voltage VOHVCC= 4.5 V VIN= VIH= 2.0 V or VIL= 0.8 V IOH= -2

41、0 A 1, 2, 3 All 4.4 V IOH= -4.0 mA 3.7 Low level output voltage VOLVCC= 4.5 V VIN= VIH= 2.0 V or VIL= 0.8 V IOL= +20 A 1, 2, 3 All 0.1 V IOL= +4.0 mA 0.4 High level input voltage VIH2/ VCC= 4.5 V 1, 2, 3 All 2.0 V Low level input voltage VIL2/ VCC= 4.5 V 1, 2, 3 All 0.8 V Quiescent supply current IC

42、CVCC= 5.5 V, VIN= VCCor GND IOUT= 0.0 A 1, 2, 3 All 80 A Input leakage current IINVCC= 5.5 V, VIN= VCCor GND 1, 2, 3 All 1.0 A Additional quiescent supply current, TTL inputs ICCAny one input VIN= 2.4 V or 0.5 V Other inputs VIN= VCCor GND VCC= 5.5 V 1, 2, 3 All 3.0 mA Input capacitance CINVIN= 0 V,

43、 see 4.4.1c 4 All 10 pF Power dissipation capacitance CPD3/ See 4.4.1c 4 All 42 pF Functional tests See 4.4.1b 7, 8 All Propagation delay time, mCP to mQ or mQtPHL1, tPLH1VCC= 4.5 V CL= 50 pF See figure 4 9 All 40 ns 10, 11 60 Propagation delay time , mSto mQ tPLH29 All 30 ns 10, 11 45 Propagation d

44、elay time, mSto mQtPHL24/ 9 All 45 ns 10, 11 68 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-90701 REVISION LEVEL B SHEET 7 DS

45、CC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Test conditions 1/ -55C TC +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max Propagation delay time, mRto mQ tPHL34/ VCC= 4.5 V CL= 50 pF See figure 4 9 All 45 ns 10, 11 68 Pro

46、pagation delay time, mRto mQtPLH39 All 37 ns 10, 11 56 Transition time tTHL, tTLH4/ 9 All 15 ns 10, 11 22 1/ For a power supply of 5.0 V 10%, the worst case output voltages (VOHand VOL) occur for HCT at VCC= 4.5 V. Thus, the 4.5 V values should be used when designing with this supply. Worst cases VI

47、Hand VILoccur at VCC= 5.5 V and 4.5 V, respectively. 2/ Test is guaranteed if applied as a forcing function for VOHor VOLtests. 3/ Power dissipation capacitance (CPD) determines the dynamic power consumption (PD) and the dynamic current consumption (IS): PD(total) = (CPD+ CL) VCC2f + (VCCx ICC) + (n

48、 x d x ICCx VCC) IS= (CPD+ CL) VCC f + ICC+ (n x d x ICC) f is input switching frequency; n is number of inputs switching; d is duty cycle; CLis load capacitance on each output. 4/ This parameter, if not tested, shall be guaranteed to the limits specified in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE