DLA SMD-5962-90847 REV G-2010 MICROCIRCUIT MEMORY DIGITAL CMOS 1MEG X 4 DRAM MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R031-93. 92-11-24 M.A. Frye B Changes in accordance with NOR 5962-R205-95. 95-12-15 M.A. Frye C Update and make changes to case outline N. Update boilerplate. Editorial changes throughout. 96-06-06 M.A. Frye D

2、Changes in accordance with NOR 5962-R050-98. 98-03-06 Raymond Monnin E Changes in accordance with NOR 5962-R138-98. 98-07-20 Raymond Monnin F Update figure 1 for case Z to indicate pin 1. Update boilerplate paragraphs. ksr 04-12-17 Raymond Monnin G Update boilerplate paragraphs. glg 10-02-26 Charles

3、 Saffle REV G G G G G G G SHEET 35 36 37 38 39 40 41 REV G G G G G G G G G G G G G G G G G G G G SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 REV STATUS REV G G G G G G G G G G G G G G OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Rajesh Pithadia DEFENSE

4、SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 STANDARD MICROCIRCUIT CHECKED BY Kenneth Rice http:/www.dscc.dla.mil DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, MEMORY, DIGITAL, CMOS 1MEG X 4 DRAM, MONOLITHIC SILICON AND AGENCIES OF THE DEP

5、ARTMENT OF DEFENSE DRAWING APPROVAL DATE 92-03-04 AMSC N/A REVISION LEVEL G SIZE A CAGE CODE 67268 5962-90847 SHEET 1 OF 41 DSCC FORM 2233 APR 97 5962-E206-10 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-9

6、0847 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case

7、outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 90847 01 M R X Federal stock class designa

8、tor RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropria

9、te RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Gener

10、ic number 1/ Circuit function Access time 01 1 M x 4, DYNAMIC RAM 120 ns 02 1 M x 4, DYNAMIC RAM 100 ns 03 1 M x 4, DYNAMIC RAM 80 ns 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements doc

11、umentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835

12、and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 dual-in-line X See figure 1 20 flat pack Y See figure 1 26/20 leadless ceramic chip carrier Z See figure 1 26/20 J-leaded chip carrier U See figure 1 20 dual-in-line T See figure 1 26/20 leadles

13、s ceramic chip carrier M See figure 1 20 flat pack N See figure 1 20 zig-zag in-line 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1/ Generic numbers are listed on the Standard Microcircuit Drawing Sour

14、ce Approval Bulletin at the end of this document and will also be listed in MIL-HDBK-103. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90847 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISIO

15、N LEVEL G SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 2/ Voltage range on any pin - -1 V dc to 7 V dc Voltage range on VCC- -1 V dc to 7 V dc Short circuit output current - 50 mA Maximum power dissipation (PD) - 1 W Storage temperature range - -65C to +150C Lead temperature (solderin

16、g, 10 seconds) - +300C Thermal resistance, junction-to-case (JC) Case outline R - See MIL-STD-1835 Case outlines X, Y, Z, U, T, M, and N - 20C/W 3/ Junction temperature (TJ) 4/ - +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) 5/ - +4.5 V dc to +5.5 V dc High-level input volta

17、ge (VIH) - 2.4 V dc minimum to 6.5 V dc maximum Low-level input voltage (VIL) 6/ - -1.0 V dc minimum to 0.8 V dc maximum Case operating temperature range (TC) - -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and h

18、andbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMEN

19、T OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these docume

20、nts are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein.

21、Unless otherwise specified, the issues of the documents are the issues of the documents cited in the solicitation. 2/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 3/ When

22、the thermal resistance for this case is specified in MIL-STD-1835, that value shall supersede the value indicated herein. 4/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. 5/ All volta

23、ge values in this drawing are with respect to VSS. 6/ The algebraic convention, where the more negative (less positive) limit is designated as a minimum, is used in this drawing for logic voltage levels only. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from I

24、HS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90847 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 4 DSCC FORM 2234 APR 97 ELECTRONICS INDUSTRIES ASSOCIATION (EIA) JEDEC Standard EIA/JESD78 - IC Latch-Up Test. (Applications for copies should be addressed to the El

25、ectronics Industries Association, 2500 Wilson Boulevard, Arlington, VA 22201; http:/www.jedec.org.) (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents also may be available in or through libraries o

26、r other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption

27、has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not a

28、ffect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and

29、physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein and figure 1 . 3.2.2 Terminal connections. The terminal connect

30、ions shall be as specified on figure 2 . 3.2.3 Truth tables. The truth table shall be as specified on figure 3 . 3.2.4 Functional tests. Various functional tests used to test this device are contained in the appendix A. If the test patterns cannot be implemented due to test equipment limitations, al

31、ternate test patterns to accomplish the same results shall be allowed. For device class M, alternate test patterns shall be maintained under document revision level control by the manufacturer and shall be made available to the preparing or acquiring activity upon request. For device classes Q and V

32、, alternate test patterns shall be under the control of the device manufacturers Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the preparing or acquiring activity upon request. 3.2.5 Die overcoat. Polyimide and silicone coatings are allowable as an ove

33、rcoat on the die for alpha particle protection only. Each coated microcircuit inspection lot (see inspection lot as defined in MIL-PRF-38535) shall be subjected to and pass the internal moisture content test at 5000 ppm (see method 1018 of MIL-STD-883). The frequency of the internal water vapor test

34、ing may not be decreased unless approved by the preparing activity. Samples may be pulled any time after seal. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter

35、limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part sh

36、all be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using th

37、is option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V

38、shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90847 DEFE

39、NSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 5 DSCC FORM 2234 APR 97 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (se

40、e 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for thi

41、s drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device c

42、lasses Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving de

43、vices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshor

44、e documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 41 (see MIL-PRF-38535, appendix A). 4. VERIFICATION 4.1 Sampling and inspection.

45、For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampl

46、ing and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. For device class M,

47、 screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. 4.2.1 Additional criteria for device class M. a. Delete the sequence specified as initial (preburn-in) electrical parameters through interim (postburn-in)

48、 electrical parameters of method 5004 and substitute lines 1 through 6 of table IIA herein. b. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specif