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本文(DLA SMD-5962-90889 REV C-2008 MICROCIRCUIT DIGITAL BIPOLAR CMOS QUADRUPLE BUS BUFFER GATE TTL COMPATIBLE MONOLITHIC SILICON《微电路 单片硅晶体管-晶体管逻辑(TTL)兼容数字双极型四总线缓冲门》.pdf)为本站会员(visitstep340)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-90889 REV C-2008 MICROCIRCUIT DIGITAL BIPOLAR CMOS QUADRUPLE BUS BUFFER GATE TTL COMPATIBLE MONOLITHIC SILICON《微电路 单片硅晶体管-晶体管逻辑(TTL)兼容数字双极型四总线缓冲门》.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes are in accordance with the notice of revision 5962-R285-92. - jak 94-05-02 Monica L. Poeking B Changes are in accordance with the notice of revision 5962-R177-95. - jak 95-09-07 Thomas M. Hess C Redrawn with changes. Update boilerplate to

2、 the current requirements of MIL-PRF-38535. - phn 08-04-02 Thomas M. Hess REV SHET REV SHET REV STATUS REV C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Marcia B. Kelleher CHECKED BY Thomas J. Ricciuti DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http

3、:/www.dscc.dla.mil APPROVED BY Michael A. Frye DRAWING APPROVAL DATE 90-10-31 MICROCIRCUIT, DIGITAL, BIPOLAR CMOS, QUADRUPLE BUS BUFFER GATE, TTL COMPATIBLE, MONOLITHIC SILICON STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENS

4、E AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-90889 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E312-08 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90889 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OH

5、IO 43216-5000 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are

6、 reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 90889 01 M C A Federal stock class designator RHA designator (see 1.2.1) Device type (see

7、1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devic

8、es meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54BCT126A Quadruple

9、bus buffer gate with three-state outputs 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN

10、 class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style C CDIP3-T14 14

11、Dual-in-line D GDFP1-F14 14 Flat pack 2 CQCC1-N20 20 Square chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without licens

12、e from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90889 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc Input voltage range (VIN) . -0.5 V dc to +7.0 V dc

13、 Voltage applied to any output in the disabled state . -0.5 V dc to +5.5 V dc Voltage applied to any output in the high state -0.5 V dc to VCCCurrent into any output in the low state . 96 mA Storage temperature range (TSTG) . -65C to +150C Lead temperature (soldering, 10 seconds) +300C Thermal resis

14、tance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) +175C Power dissipation (PD) . 386.1 mW 2/ Input clamp current (IIC) . -30 mA 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Minimum high level input voltage (VIH) . 2.0 V Maximum low lev

15、el input voltage (VIL) . 0.8 V Maximum high level output current (IOH) -12 mA Maximum low level output current (IOL) 48 mA Case operating temperature range (TC) -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and h

16、andbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMEN

17、T OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these docume

18、nts are available online at http:/assist.daps.dla.mil;quicksearch/ or www.dodssp.daps.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the refer

19、ences cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at

20、the maximum levels may degrade performance and affect reliability. 2/ Must be able to withstand the additional PDdue to that circuit test, e.g., IOS. The PDnumber is based upon dc values. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICRO

21、CIRCUIT DRAWING SIZE A 5962-90889 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified here

22、in or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class lev

23、el B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline(s). T

24、he case outline(s) shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Block diagram. The block diagram shall be as specified on figure 3. 3.2.5 T

25、est circuit and switching waveforms. The test circuit and switching waveforms shall be as specified on figure 4. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation paramete

26、r limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part s

27、hall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using t

28、his option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V

29、 shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in orde

30、r to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior

31、 to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A

32、certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA

33、 of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers faci

34、lity and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 126 (see MIL-PRF-38535, append

35、ix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90889 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteris

36、tics. Limits Test Symbol Test conditions -55C TC +125C unless otherwise specified Group A subgroups Min Max Unit IOH= -3 mA 2.4 High level output voltage VOHVCC= 4.5 V, VIH= 2.0 V, VIL= 0.8 V IOH= -12 mA 1, 2, 3 2.0 V Low level output voltage VOLVCC= 4.5 V, IOL= 48 mA VIH= 2.0 V, VIL= 0.8 V 1, 2, 3

37、0.55 V Input clamp voltage VICVCC= 4.5 V, IIN= -18 mA 1, 2, 3 -1.2 V IIH1VCC= 0.0 V VIN= 7.0 V 100 High level input current IIH2VCC= 5.5 V VIN= 2.7 V 1, 2, 3 35 A Low level input current IILVCC= 5.5 V, VIN= 0.5 V 1, 2, 3 -20 A Output current IOSVCC= 5.5 V, VOUT= 0.0 V 1/ 1, 2, 3 -100 -225 mA ICCH33

38、ICCL51 Supply current ICCZVCC= 5.5 V, Outputs open 1, 2, 3 10 mA IOZHVOUT= 2.7 V 50 Off state output leakage current IOZLVCC= 5.5 V VOUT= 0.5 V 1, 2, 3 -50 A Functional test See 4.4.1b 2/ 7, 8 tPLH1.5 4.9 tPHLVCC= 5.0 V, CL= 50 pF R1= R2= 500 , See figure 4 9 2.7 6.9 tPLH6.3 Propagation delay time A

39、 to Y tPHLVCC= 4.5 V and 5.5 V dc, CL= 50 pF R1= R2= 500 , See figure 4 10, 11 2.7 7.7 tPZH2.6 6.4 tPZLVCC= 5.0 V, CL= 50 pF R1= R2= 500 , See figure 4 9 3.7 8.3 tPZH7.9 Output enable time, G to Y tPZLVCC= 4.5 V and 5.5 V dc, CL= 50 pF R1= R2= 500 , See figure 4 10, 11 3.7 10.5 tPHZ3.2 8.2 tPLZVCC=

40、5.0 V, CL= 50 pF R1= R2= 500 , See figure 4 9 3.4 8.0 tPHZ10.0 Output disable time, G to Y tPLZVCC= 4.5 V and 5.5 V dc, CL= 50 pF R1= R2= 500 , See figure 4 10, 11 3.4 12.3 ns 1. Not more than one output should be tested at one time and the duration of the test condition shall not exceed one second.

41、 2. Functional tests shall be conducted at input test conditions of 0.4 V VIL 0.8 V and 2.0 V VIH 2.4 V, for VCC= 4.5 V and repeated at VCC= 5.5 V. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90889 DEFENS

42、E SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 Case outline C and D 2 Case outline C and D 2 Terminal number Terminal symbol Terminal number Terminal symbol 1 1G NC 11 4Y NC 2 1A 1G 12 4A 3Y 3 1Y 1A 13 4G 3A 4 2G 1Y 14 VCC3G 5 2A NC 15 - NC 6 2Y 2G

43、16 - 4Y 7 GND NC 17 - NC 8 3Y 2A 18 - 4A 9 3A 2Y 19 - 4G 10 3G GND 20 - VCCNC = No internal connection FIGURE 1. Terminal connections. Inputs Outputs G A Y H H H H L L L X Z H = High voltage level Z = High impedance L = Low voltage level X = Irrelevant FIGURE 2. Truth table. Provided by IHSNot for R

44、esaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90889 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 FIGURE 3. Block diagram. NOTES: 1. CL = 50 pF, includes probe and jig capa

45、citance. 2. RL = R1 = r2 = 500 Test S1 tPLHOpen tPHLOpen tPZHOpen tPZLClosed tPHZOpen tPLZClosed FIGURE 4. Test circuit and switching waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90889 DEFENSE S

46、UPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97 NOTES: 1. Output with internal conditions such that the output is low except when disabled by the output control. 2. Output with internal conditions such that the output is high except when disabled by the

47、 output control. 3. All input pulses are supplied by the generators having the following characteristics: PRR 10 MHz, ZO= 50, tr 2.5 ns, tf 2.5 ns. 4. The outputs are measured one at a time with one transition per measurement. FIGURE 4. Test circuit and switching waveforms - Continued. Provided by I

48、HSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90889 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 9 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturers Quality Management (QM) plan. The modification in th

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