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本文(DLA SMD-5962-90901-1992 MICROCIRCUITS DIGITAL CMOS OCTAL REGISTERED TRANSCEIVER MONOLITHIC SILICON《硅单块 八进制记名的收发器 互补金属氧化物半导体 数字微型电路》.pdf)为本站会员(wealthynice100)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-90901-1992 MICROCIRCUITS DIGITAL CMOS OCTAL REGISTERED TRANSCEIVER MONOLITHIC SILICON《硅单块 八进制记名的收发器 互补金属氧化物半导体 数字微型电路》.pdf

1、L i LTR DESCRIPTION DATE (YR-MO-DA) SMD-5962-9090L m 9999976 0030708 TT APPROVED REVISION LEVEL REV SHEET SIZE CAGE CODE 5962-90901 A 67268 SHEET 1 OF 16 * SHEET REV STATUS OF SHEETS PMIC NIA STANDARDIZED MILITARY DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPAR

2、TMENT OF DEFENSE SC NIA PREP RED BY distribution is unlimited. 5962-E51 4-92 Licensed by Information Handling ServicesSflD-59b2-909OL m 9999996 0030709 933 m STANDARDIZED MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER MYTOIS, Om0 45444 SIZE 5962-90901 A REVISION LEVEL SHEET 1.2.1 RHA desianator.

3、 Device classes H, 8, and S RHA mrked devices shall meet the HIL-H-31510 specified RHA levels ind shall be marked with the appropriate RHA designator. IIL-1-38535 specified MA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a ion-RHA device. Device classes Q and

4、V RHA uarked devices shall met the 1.2.2 Device typeW. The device typds) shall identify the circuit function as follows: Devi ce type Generic number Circuit function o1 29FCT52A/54FCT52A Octal registered transceiver with three-state outputs 02 29FCT52B/54FCT528 Octal registered transceiver with thre

5、e-state outputs o3 29FCT52C/54FCT52C Octal registered transceiver with three-state outputs 1.2.3 Device class designator. The device class designator shall be a single letter identifying the product ssurance level as follows: Device class Device requiremnts documentation H Vendor self-certification

6、to the requirements for non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883 B or S Q or V Certification and qualification to HILX38510 Certificat ion and qua tif i cation to MIL-1-38535 1.2.4 Case outline(s). The case outlinds) shall be as designated in MIL-STD-1835 and as follows:

7、 Outline letter Descriptive designator Tcrninals Packaae tyue K GDFP2-F24 or CDFP3-F24 24 flat pack L GDIP3-T24 or CDIP4-T24 24 dual-in-line 3 CQCCI-NZ8 28 leadless chip carrier 1.2.5 Lead finish. lasses Q and Y. Finish letter a8X1a shall not be marked on the microcircuit or its packaging. or use in

8、 specifications when lead finishes A, B, and C are considered acceptable and interchangeable without reference. The lead finish shall be as specified in HIL-H-38510 for classes M, 8, and S or MIL-1-38535 for The “X“ designation is DESC FORM 193A JUL 91 Licensed by Information Handling Services SMD-5

9、962-90901 m 9999996 0030710 655 m Supply voltage range (Vcc) . High-level input voltage (VI 1 . Low-level input voltage (v, Case operating temperature range (TC) 1.3 Absolute maximum ratings. 11 Terminal voltage range (VTERM) (referenced to ground): Outputs and $50 terminals . Storage temperature ra

10、nge hysical dimensions. The design, construction, and physical dimensions shall be as 3.2.1 Case outlines. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth tables. 3.2.4 Logic diaram. 3.2.5 Radiation exposure circuit. 3.3 Electrical Performance char

11、acteristics and postirradiation parameter limits. The case outlines shall be in accordance with 1.2.4 herein. The truth tables shall be as specified on figure 2. The logic diagram shall be as specified on figure 3. The radiation exposure circuit shall be specified when available. Unless otherwise sp

12、ecified herein, :he electrical performance characteristics and postirrodiation parameter linits are as specified in table I and shall ipply over the full case operating temperature range. he electrical tests for each subgroup are defined in table 1. iccordencc with HIL-STD-883 (see 3.1 herein). IIL-

13、BUL-103. ind V shall be in accordance with HIL-1-38535. 3.4 Electrical test requirements. The electrical test rquirmnts shall be the subgroups specified in table II. The part shall be marked with the PIN listed in 1.2 herein. Marking for device class H shall be in 3.5 Harking. In uddition, the manuf

14、acturers PIN may also be marked as listed in Marking for device classes B and S shall be in accordance with HIL-k38510. Marking for device classes Q 3.5.1 Certification/cowliance mrk. nie compliance nark for device class H shall be a “C“ as rquired in The certification mark for device classes B and

15、S shall be a “J“ or “JAN“ as required in IXL-STD-883 (see 3.1 herein). IIL-H-38510. The certification mark for device classes Q and V shall be a “WL“ as rquired in MIL-1-38535. 3.6 Certificate of colpliance. For device class H, a certificate of conpliance shall be required from a wnufacturer in orde

16、r to be listed as an approved source of supply in HIL-BL-103 (see 6.7.3 herein). :lasses Q and V, a certificate of cainpliance shall be rquired frm a QNL-38535 listed manufacturer in order to supply o the rquircwnts of this drawing (see 6.7.2 herein). The certificate of colpliance submitted to DESC-

17、EC prior to .isting as an approved source of supply for this drawing shall affirm that the manufacturerls product meets, for device :lass H the rquirements of HIL-STD-883 (see 3.1 herein), or for device classes Q and V, the requirements of IIL-1-38535 and the rqui remnts herein. ierein) or device cl

18、asses Ei and S in HIL-H-38510 or for device classes P and V in HIL-1-38535 shall be provided with ach lot of microcircuits delivered to this drawing. see 6.2 herein) involving devices acquired to this drawing is rquired for any change as defined in HIL-STD-480. For device class M, DESC, DESCs agent,

19、 and the acquiring activity etain the option to review the nanufacturers facility and applicable rquired documentation. Offshore documentation hall be made available onshore at the option of the reviewer. For device 3.7 Certificate of confornsnce. A certificate of conformance as rquired for device c

20、lass H in HIL-STD-883 (KC 3.1 3.8 Notification of change for device class M. 3.9 Verification and revieu for device class H. For device class H, notification to DESC-EC of change of product I 3.10 Microcircuit group assiannent for device classes M. 8. and S. Device classes H, 6, and S devices covere

21、d by his drawing shall be in microcircuit group number 105 (see HIL-M-38510, appendix E). STADARDIZED MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CER DAYTON, OHIO 45444 3.11 Serialization for device class S. All device class S devices shall be serialized in accordance with 111-H-38510. SIZE 5962-909

22、01 A REVISION LEVEL SHEET 4 Licensed by Information Handling ServicesSMD-5962-909UI1 W 9999996 0030732 428 H I TABLE I. Electrical performance characteristics. I Test 1 Symbol Conditions Devi ce Limits 1 Unit -55C 5 TC S +125“C 4.5 v 5 vcc 5 5.5 v I zops 1 type 1 I - Min 1 Max 1 I I unless otherwise

23、 specified I/ I I I I I 1 1,2,3 1 All 1 2.0 IV + I i IH 1 I “0.5 I Input high voltage I i I I I I 1 VIL 1,2,3 1 All 1 -0.5 1 0.8 1 V I I VIN = 0.2 V, 2.8 V I I I Input low voltage Output high voltage I I l vcc = 3 v, IOH = -32 PA 1,2,3 ALL 2.8 V I VCt = 4.5 v, IOH -300 PA 1,2,3 Al 1 4.3 IV IIOH = -1

24、5 mA I 1,2,3 I All I 2.4 I !v I IN = IH IL I VoH I Output low voltage j vcc = 3 v, j 0.2 j v I vcc = 4.5 v, IoL = 300pA 1,2,3 All 1 1 0.2 1 v Clamp diode voltage VCD I VcC = 4.5 V, IIN = -18 mA 1,2,3 i All l -1.2 I v /IoL = 300 PA 1 1,2,3 1 All j I VIN = 0.2 V, 2.8 V I I I I I OL I I I I I I I I IIo

25、L = 48 mA I 1,2,3 I All I I 0.55 I V I IN = IH IL I I I I I I l I 1,2,3 All 1 I 5 IPA VIN = 2.7 V 21 1,2,3 ALL 5 PA I IN = CC 1,2,3 I All l 15 I PA II“ I VCC = 5.5 v IN = CC Input high current (except / pins) I I I I I (I/O pins only) I I I I I I Input high current I I I VIN = 2.7 V 2/ 1 1,2,3 i All

26、 I I15 IP VIN = GND 1,2,3 All -5 PA I I VIN = 0.5 V 21 1,2,3 I All I I -5 I PA I Input low current l I VIN = GND I 1,2,3 I All I I -75 I PA All I -60 I I mA (I/O pins only) I I Short circuit current Ios I Vcc = 5.5 V, VOUT = GND 31 1 ,2,3 1 IIL Input Lou current (except I/o pins) I I I I I I VIN = 0

27、.5 V 21 1,2,3 I All -15 PA I I I I 1 I Quiescent power supply I All 1 1 1.5 I mA I I I I I I 123 I Icc I current I I Quiescent power supply 1 AIcc 1 VCs = 5.5 V, VIN = 3.4 V, 1 1,2,3 1 All 1 I 2.0 I mA I I I I I 0.25 I mA/MHz current, TTL inputs I I f - O MHz, outputs open s/ I high I I I All I I Dy

28、namic power supply I ICCD Vcc = 5.5 V, outputsopen, I I current one input toggling, OE = GND, 50% duty cycle, VIN 2 5.3 V, I VIN 5 0.2 v 51 I I I STANDARDIZED SIZE 5962-90901 MILITARY DRAWING A DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 REVISION LEVEL SHEET 5 DESC FORM 193A JUL 91 Licensed

29、 by Information Handling ServicesSMD-59b2-90901 D 9999996 0030733 3b4 Grwp A Device Limits vc = 5.5 v, 2 5.3 V, I 1,2,3 1 All I i 7.8 I outputs open, f = 10 wz, I duty cycle OE = GND, eight bits toggling at f. = 2.5 MHz 50% auty cycle I m3 16.8 VIN = 3.4 V, VIN = GND ALL input teriinah, see 4.4.1 IN

30、 I 4 All 10 CIl0 I All II0 terminds, see 4.4.1 4 I All 12 o2 i 03 9,10,11 o1 lo2 lo3 2.0 i 8.0 2.0 I 7.3 t l 1.5 I 13.0 1.5 8.5 1.5 8.0 tpHL 7, - i see figure 4 o2 o3 1.5 a.0 1.5 7.5 TABLE I. Electrical performce character Symbol I Condi t ions -55.C S Tc S +125*C 4.5 v s vcc s 5.5 v unless otherwis

31、e specified I/ I I I v = 5.5 v, IC - 6/ 1 I see 4.4.lb 1 ropagation delay CPA, CPB to AN, BN umt enable time , OEB to AN, N valid ns tPZH tPZL 7/ tPHZt tPLt 71 tS1 ns ns ns umt disable time , OEB to AN, RN high-impedance nS ns I I I ietup time high or low AN, B, to CPA, CPB bld time high or Lou A, B

32、N to CPA, CPB no HI tS2 nt ns ;ew tee footnotes at end of table. DESC FORM 193A JUL 91 STADARIZED 5962-90901 MILITARY DRAWIUG DEFEISE ELECTROHICS SUPPLY CEIOTER MYTOU, OHIO 45444 Licensed by Information Handling ServicesSMD-5762-90901 W 9999996 0030734 2TO unless otherwise specified I/ I Min I Max I

33、 I I I I CL = 50 pF, RL = 50013, I 9,10,11 1 All 1 2.0 1 I ns i see figure 4 ! oxtimehigh or low I tH2 CEA, CEE to CPA, CPB I ulse width high or I tpW low CPA or CPB I L I I I ns I 9,10,11 1 All / All tests shall be performed using worst-case test conditions, unless otherwise specified. I/ Parameter

34、 is not tested for devices 01, 02, and 03, but limit shall be guaranteed. L/ Only one output shorted at a time for 1 second maximum duration. L/ Per TTL driven input (VIN = 3.4 V); all other inputs at Vcc or GND. !/ This parameter is not directly testable, but is derived for use in total power suppl

35、y (Ic) calculations. STANDARDIZED MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 AlL = Power supply current for a TTL high input (VIN = 3.4 V) DHCL Duty cycle for TTL inputs high NT = Number of TTL inputs a DH :kD=-clock frequency for devices fi = Input frequency N. = Number o

36、f inputs at fi All currents are in mA and all frequencies are in MHz. I/ Minimum limits are guaranteed but not tested. - Dynamic current caused by an input transition pair (HLH or LHL) SIZE 5962-90901 A REVISION LEVEL SHEET DESC FORM 193A JUL 91 Licensed by Information Handling ServicesSMD-5962-9090

37、3 W 999999b 0030735 337 W I Device typcs I Case outlines I I 3 5962-90901 STAWI ZED MILITARY DRAWIHG DEFENSE ELECTROtlICS SUPPLY CEUTER MYTOH, OHIO 45444 DESC FORM 193A JUL 91 Licensed by Information Handling ServicesSMD-5962-90903 m 9999996 0030736 073 m I I I I Reqister functional table (Applies t

38、o A or B register) I I Inputs - D CP CE X X H L L L H Internal Q Function NC Hold data L Load data H Load data - OE H L L NOTES: H = HIGH voltage level L = LOW voltage level X = Dont care NC = No change ? = LOU-to-HIGH transition Internal Y-ou tpu t s Q Function X i! Disable outputs L L Enable outpu

39、ts H H Enable outputs FIGURE 2. Truth tables. STANDARD1 ZED MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 SIZE 5962-90901 A REVISION LEVEL SHEET DESC FORM 193A JUL 91 Licensed by Information Handling ServicesSMD-5962-9090L = 999999b 0030717 TOT STUOIMEU)IZED MILITARY DRAwfloG

40、 DEFESE ELECTMMICS StlPPLY CENTER I DAmOu, OHIO 45444 CPA CEA AO Ai A2 A3 A4 As - k962-9090 1 3. SIZE b II r . .- REVISION Zo S SU; tr d 2.5 ns; tf d 2.5 ns. Enable and disable times FIGURE I. Switchinq waveforms and test circuit - Continued. DESC FRM 193A JUL 91 Licensed by Information Handling Ser

41、vicesSMD-5962-9090L 9999996 0030720 5T4 4. QUALITY ASSURANCE PROVISIONS 4.1 Samplinq and inspection. For device class M, sampling and inspection procedures shall be in accordance with section 4 of MIL-M-38510 to the extent specified in MIL-STD-883 (see 3.1 herein). and inspection procedures shall be

42、 in accordance with MIL-M-38510 and method 5005 of MIL-STD-883, except as modified herein. device manufacturers QM plan. For device classes B and S, sampling For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-1-38535 and the 4.2 Screening. For device class

43、 M, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. For device classes B arid S, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to qualifica

44、tion and quality conformance inspection. For device classes Q and V, screening shall be in accordance with MIL-1-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. 4.2.1 Additional criteria for device classes M, 8, and S. a. Burn-in test, metho

45、d 1015 of MIL-STD-883. (1) Test condition A, 8, C, or D. For device class M, the test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. qualifying activity. For device classes M, 8, a

46、nd S, the test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015. For device classes B and S, the test circuit shall be submitted to the (2) TA = +12SoC, minimum. Interim and final electrical test para

47、meters shall be as specified in table II herein. b. 4.2.2 Additional criteria for device classes Q and V. a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturers QM plan in accordance with MIL-1-38535. maintained u

48、nder document revision level control of the device manufacturers Technology Review Board (TRB) in accordance with MIL-1-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applica

49、ble, in accordance with the intent specified in test method 1015. Interim and final electrical test parameters shall be as specified in table II herein. Additional screening for device class V beyond the requirements of device class Q shall be as specified in appendix B of MIL-1-38535. The burn-in test circuit shall be I b. c. 4.3 Qualification inspection. 4.3.1 Qualification inspection for device classes B and S. Qualification inspection for device classes B and S shall be in accordance with MIL-M-38510. MIL-STD-883 and herei

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