DLA SMD-5962-90930 REV A-2006 MICROCIRCUIT MEMORY DIGITAL CMOS 8K X 8-BIT REGISTERED DIAGNOSTIC UVEPROM MONOLITHIC SILICON《硅单块 互补金属氧化物半导体8K X 8比特记名诊断紫外线消除式可程序化只读存储器 数字主储存器微型电路》.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Boilerplate update and part of five year review. tcr 06-11-30 Raymond Monnin REV SHEET REV A A A A A A A SHEET 15 16 17 18 19 20 21 REV STATUS REV A A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY G

2、ary L. Gross DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Jeff Bowling COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, MEMORY, DIGITAL, CMOS 8K X 8-BIT REGISTERED DIAGNOSTIC UVE

3、PROM, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 93-05-07 AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-90930 SHEET 1 OF 21 DSCC FORM 2233 APR 97 5962-E076-07 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS

4、-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90930 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space

5、 application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5

6、962 - 90930 01 M X X Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specifie

7、d RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the

8、circuit function as follows: Device type Generic number Circuit function Access time 01 7C269 8K x 8-bit registered diagnostic UVEPROM 50 ns 02 7C269 8K x 8-bit registered diagnostic UVEPROM 25 ns 03 7C269 8K x 8-bit registered diagnostic UVEPROM 15 ns 1.2.3 Device class designator. The device class

9、 designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certifi

10、cation and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style 1/ X CDIP3-T28 or GDIP4-T28 28 Dual-in-line package Y GDFP2-F28 28 Flat package 3 CQCC1-N28 28 Square l

11、eadless chip carrier package 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1/ Lid shall be transparent to permit ultraviolet erasure. Provided by IHSNot for ResaleNo reproduction or networking permitted

12、 without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90930 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 2/ Supply voltage range to ground potential (VCC) -0.5 V dc to +7.0 V dc DC voltage rang

13、e applied to the outputs in the high Z state. -0.5 V dc to +7.0 V dc DC input voltage -3.0 V dc to +7.0 V dc DC program voltage . 13.0 V dc Maximum power dissipation. 1.0 W 3/ Lead temperature (soldering, 10 seconds). +260C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temper

14、ature (TJ). +175C Storage temperature range (TSTG) . -65C to +150C Temperature under bias . -55C to +125C Data retention 10 years, minimum Endurance 25 cycles / byte, minimum 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc minimum to +5.5 V dc maximum Ground voltage (GND)

15、. 0 V dc Input high voltage (VIH) . 2.0 V dc minimum Input low voltage (VIL) 0.8 V dc maximum Case operating temperature range (TC). -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this

16、 drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-S

17、TD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at

18、http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximu

19、m levels may degrade performance and affect reliability. 3/ Must withstand the added PDdue to short circuit test; e.g., IOS. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90930 DEFENSE SUPPLY CENTER COLUMBU

20、S COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 2.2 Non-Government publications. The following documents form a part of this document to the extent specified herein. Unless otherwise specified, the issues of the documents are the issues of the documents cited in the solici

21、tation. ELECTRONICS INDUSTRIES ALLIANCE (EIA) JEDEC Standard EIA/JESD 78 - IC Latch-Up Test. (Applications for copies should be addressed to the Electronics Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201; http:/www.jedec.org.) AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM) ASTM S

22、tandard F1192-00 - Standard Guide for the Measurement of Single Event Phenomena Induced by Heavy Ion Irradiation of Semiconductor Devices. (Applications for copies of ASTM publications should be addressed to: ASTM International, PO Box C700, 100 Barr Harbor Drive, West Conshohocken, PA 19428-2959; h

23、ttp:/www.astm.org.) (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents also may be available in or through libraries or other informational services.) 2.3 Order of precedence. In the event of a conf

24、lict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item re

25、quirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requir

26、ements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device

27、 classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as spe

28、cified on figure 2. 3.2.3.1 Unprogrammed devices. The truth table for unprogrammed devices for contracts involving no altered item drawing shall be as specified on figure 2. When required in groups A, B, C, or D (see 4.4), the devices shall be programmed by the manufacturer prior to test with a chec

29、kerboard pattern or equivalent (a minimum of 50 percent of the total number of bits programmed) or to any altered item drawing pattern which includes at least 25 percent of the total number of bits programmed. 3.2.3.2 Programmed devices. The truth table for programmed devices shall be as specified b

30、y an attached altered item drawing. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case opera

31、ting temperature range. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90930 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical perfor

32、mance characteristics. Test Symbol Conditions -55C TC +125C 4.5 V VCC 5.5 V Group A subgroups Device types Limits Unit unless otherwise specified Min Max Output high voltage VOHVCC= 4.5 V, IOH = -4 mA 1, 2, 3 01 2.4 V VIN= VIH, VILIOH = -2 mA 02, 03 Output low voltage VOLVCC= 4.5 V, IOL = 8 mA 1, 2,

33、 3 01 0.4 V VIN = VIH, VILIOL = 6 mA 02, 03 Input high voltage 1/ VIH1, 2, 3 All 2.0 V Input low voltage 1/ VIL1, 2, 3 All 0.8 V Input leakage current IIXVIN= VCC to GND 1, 2, 3 All -10 10 A Output leakage current IOZVOUT = VCC to GND 1, 2, 3 All -40 40 A Output short circuit IOSVCC= 5.5 V, VOUT = G

34、ND 1, 2, 3 All -20 -90 mA current 2/ 3/ Power supply current ICCVCC= 5.5 V, IOUT= 0 mA 1, 2, 3 01 120 mA VIN= 0 to 3.0 V, f = fmax 4/ 02, 03 140 Input capacitance 3/ CINVCC= 5.0 V, VIN= 0 V, TA = + 25C, f = 1.0 MHz 4 All 10 pF see 4.4.1c Output capacitance 3/ COUTVCC= 5.0 V, VOUT = 0 V, TA = + 25C,

35、f = 1.0 MHz 4 All 10 pF see 4.4.1c Functional tests see 4.4.1d 7, 8A, 8B All See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90930 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO

36、43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C 4.5 V VCC 5.5 V Group A subgroups Device types Limits Unit unless otherwise specified Min Max Address setup to clock tSASee figures 3 and 4 5/ 9

37、, 10, 11 01 50 ns 02 25 03 15 Address hold from clock tHA9, 10, 11 All 0 ns Clock to output value tCO9, 10, 11 01 25 ns 02 15 03 12 Clock pulse width tPW9, 10, 11 01 20 ns 02 15 03 12 E s setup to clock tSES9, 10, 11 01, 02 15 ns (Synch. enable only) 03 12 E s hold from clock tHES9, 10, 11 All 5 ns

38、INIT to output valid tDI9, 10, 11 01 35 ns 02 18 3/ 03 15 INIT recovery to clock tRI9, 10, 11 01 25 ns 02 15 3/ 03 12 INIT pulse width tPWI9, 10, 11 01 35 ns 02 15 3/ 03 12 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-

39、,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90930 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C 4.5 V VCC 5.5 V Group A subgroups Device types L

40、imits Unit unless otherwise specified Min Max Output inactive from clock tHZSSee figures 3 and 4 5/ 9, 10, 11 01 25 ns 02 15 (Synchronous mode) 3/ 6/ 03 12 Output inactive from E tHZE9, 10, 11 01 25 ns 02 15 high (Asynchronous mode) 3/ 6/ 03 12 Output valid from clock tCOS9, 10, 11 01 25 ns 02 15 (S

41、ynchronous mode) 03 12 Output valid from E low tDOE9, 10, 11 01 25 ns 02 15 (Asynchronous mode) 3/ 03 12 Setup SDI to clock tSSDI9, 10, 11 01 35 ns 02 30 03 25 SDI hold from clock tHSDI9, 10, 11 All 0 ns 01 40 02 30 SDO delay from clock tDSDO9, 10, 11 03 25 ns Minimum clock low tDCL9, 10, 11 All 25

42、ns Minimum clock high tDCH9, 10, 11 All 25 ns Setup to mode change 3/ tSM9, 10, 11 01, 02 30 ns 03 25 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90930 DEFENSE SUPPLY CENTER

43、 COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C 4.5 V VCC 5.5 V Group A subgroups Device types Limits Unit unless otherwise specified Min Max Hold from mode change tHM

44、See figures 3 and 4 5/ 9, 10, 11 All 0 ns Mode to SDO tMS9, 10, 11 01, 02 30 ns 03 25 SDI to SDO tSS9, 10, 11 01 45 ns 02 40 03 35 Data setup to DCLK 3/ tSO9, 10, 11 01, 02 30 ns 03 25 Data hold from DCLK 3/ tHO9, 10, 11 01 15 ns 02, 03 13 1/ These are absolute values with respect to device ground a

45、nd all overshoots and undershoots due to system or tester noise are included. 2/ For test purposes, not more than one output at a time should be shorted. Short circuit test duration should not exceed 30 seconds. 3/ Tested initially and after any design or process changes that affect that parameter,

46、and therefore shall be guaranteed to the limits specified in table I. 4/ At f = fmax, address inputs are cycling at the maximum frequency of 1/tSA. 5/ AC tests are performed with input rise and fall times of 5 ns or less, timing reference levels of 1.5 V, input pulse levels of 0 to 3.0 V, and the ou

47、tput load on figure 3. 6/ Transition is measured at steady-state high level - 500 mV or steady-state low level +500 mV on the output from the 1.5 V level on the input, CL= 5 pF (including scope and jig). See figure 3. Provided by IHSNot for ResaleNo reproduction or networking permitted without licen

48、se from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90930 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 9 DSCC FORM 2234 APR 97 FIGURE 1. Terminal connections. Device types All Case outlines X, Y, 3 Terminal number Terminal symbol 1 A72 A63 A54 A45 A36 A27 MODE 8 CLK 9 A110 A011 O012 O113