ImageVerifierCode 换一换
格式:PDF , 页数:12 ,大小:141.51KB ,
资源ID:699934      下载积分:10000 积分
快捷下载
登录下载
邮箱/手机:
温馨提示:
如需开发票,请勿充值!快捷下载时,用户名和密码都是您填写的邮箱或者手机号,方便查询和重复下载(系统自动生成)。
如填写123,账号就是123,密码也是123。
特别说明:
请自助下载,系统不会自动发送文件的哦; 如果您已付费,想二次下载,请登录后访问:我的下载记录
支付方式: 支付宝扫码支付 微信扫码支付   
注意:如需开发票,请勿充值!
验证码:   换一换

加入VIP,免费下载
 

温馨提示:由于个人手机设置不同,如果发现不能下载,请复制以下地址【http://www.mydoc123.com/d-699934.html】到电脑端继续下载(重复下载不扣费)。

已注册用户请登录:
账号:
密码:
验证码:   换一换
  忘记密码?
三方登录: 微信登录  

下载须知

1: 本站所有资源如无特殊说明,都需要本地电脑安装OFFICE2007和PDF阅读器。
2: 试题试卷类文档,如果标题没有明确说明有答案则都视为没有答案,请知晓。
3: 文件的所有权益归上传用户所有。
4. 未经权益所有人同意不得将文件中的内容挪作商业或盈利用途。
5. 本站仅提供交流平台,并不能对任何下载内容负责。
6. 下载文件中如有侵权或不适当内容,请与我们联系,我们立即纠正。
7. 本站不保证下载资源的准确性、安全性和完整性, 同时也不承担用户因使用这些下载资源对自己和他人造成任何形式的伤害或损失。

版权提示 | 免责声明

本文(DLA SMD-5962-90937 REV C-2008 MICROCIRCUIT DIGITAL BIPOLAR CMOS QUADRUPLE BUS BUFFER GATE WITH THREESTATE OUTPUTS TTL COMPATIBLE MONOLITHIC SILICON《TTL兼容单片硅四总线缓冲门三态输出双极CMOS数字微电路》.pdf)为本站会员(赵齐羽)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-90937 REV C-2008 MICROCIRCUIT DIGITAL BIPOLAR CMOS QUADRUPLE BUS BUFFER GATE WITH THREESTATE OUTPUTS TTL COMPATIBLE MONOLITHIC SILICON《TTL兼容单片硅四总线缓冲门三态输出双极CMOS数字微电路》.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes are in accordance with the notice of revision 5962-R279-92. - jak 92-09-08 Monica L. Poeking B Changes are in accordance with the notice of revision 5962-R176-95. - jak 95-09-07 Thomas M. Hess C Redrawn with changes. Update boilerplate to

2、 the current requirements of MIL-PRF-38535. - phn 08-04-02 Thomas M. Hess REV SHET REV SHET REV STATUS REV C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Marcia B. Kelleher CHECKED BY Thomas J. Ricciuti DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http

3、:/www.dscc.dla.mil APPROVED BY Michael A. Frye DRAWING APPROVAL DATE 90-10-11 MICROCIRCUIT, DIGITAL, BIPOLAR CMOS, QUADRUPLE BUS BUFFER GATE WITH THREE-STATE OUTPUTS, TTL COMPATIBLE, MONOLITHIC SILICON STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF

4、 THE DEPARTMENT OF DEFENSE AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-90937 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E313-08 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90937 DEFENSE SUPPLY CEN

5、TER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finis

6、hes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 90937 01 M C A Federal stock class designator RHA designator (see

7、 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device

8、 class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit functio

9、n 01 54BCT125A Quadruple bus buffer gate with three-state outputs 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-S

10、TD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Pack

11、age style C CDIP3-T14 14 Dual-in-line D GDFP1-F14 14 Flat pack 2 CQCC1-N20 20 Square chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking

12、 permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90937 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage (VIN) -0

13、.5 V dc to +7.0 V dc Voltage applied to a disabled three-state output -0.5 V dc to +5.5 V dc Voltage applied to any output in the high state -0.5 V dc to VCCCurrent into any output in the low state . 96 mA Input clamp current (IIC) . -30 mA Storage temperature range (TSTG) . -65C to +150C Lead tempe

14、rature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C Power dissipation (PD) . 375.1 mW 2/ 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Minimum high level input voltage (VIH) . 2.0

15、V Maximum low level input voltage (VIL) . 0.8 V Maximum high level output current (IOH) -12 mA Maximum low level output current (IOL) 48 mA Case operating temperature range (TC) -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification,

16、 standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specificati

17、on for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copie

18、s of these documents are available online at http:/assist.daps.dla.mil;quicksearch/ or www.dodssp.daps.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.3 Order of precedence. In the event of a conflict between the text of this draw

19、ing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Exten

20、ded operation at the maximum levels may degrade performance and affect reliability. 2/ Must be able to withstand the additional PDdue to that circuit test, e.g., IOS. The PDnumber is based upon dc values. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,

21、-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90937 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and

22、as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for

23、non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 C

24、ase outline(s). The case outline(s) shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Block diagram. The block diagram shall be as specified on

25、figure 3. 3.2.5 Test circuit and switching waveforms. The test circuit and switching waveforms shall be as specified on figure 4. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirr

26、adiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Ma

27、rking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RH

28、A product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for devic

29、e classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed man

30、ufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted

31、 to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate o

32、f conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notifi

33、cation to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the m

34、anufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 126 (see MIL-

35、PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90937 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical perfor

36、mance characteristics. Limits Test Symbol Test conditions -55C TC +125C unless otherwise specified Group A subgroups Min Max Unit IOH= -3 mA 2.4 High level output voltage VOHVCC= 4.5 V, VIH= 2.0 V, VIL= 0.8 V IOH= -12 mA 1, 2, 3 2.0 V Low level output voltage VOLVCC= 4.5 V, IOL= 48 mA VIH= 2.0 V, VI

37、L= 0.8 V 1, 2, 3 0.55 V Input clamp voltage VICVCC= 4.5 V, IIN= -18 mA 1, 2, 3 -1.2 V IIH1VCC= 0.0 V VIN= 7.0 V 100 High level input current IIH2VCC= 5.5 V VIN= 2.7 V 1, 2, 3 35 A Low level input current IILVCC= 5.5 V, VIN= 0.5 V 1, 2, 3 -20 A Output current IOSVCC= 5.5 V, VOUT= 0.0 V 1/ 1, 2, 3 -10

38、0 -225 mA ICCHOutputs high 31 ICCLOutputs low 49 Supply current ICCZVCC= 5.5 V, Outputs disabled 1, 2, 3 14 mA IOZHVOUT= 2.7 V 50 Off state output leakage current IOZLVCC= 5.5 V VOUT= 0.5 V 1, 2, 3 -50 A Functional test See 4.4.1b 2/ 7, 8 tPLH1.6 5.2 tPHLVCC= 5.0 V, CL= 50 pF R1= R2= 500 , See figur

39、e 4 9 2.7 6.9 tPLH6.0 Propagation delay time, nA to nY tPHLVCC= 4.5 V and 5.5 V dc, CL= 50 pF R1= R2= 500 , See figure 4 10, 11 2.7 8.0 tPZH3.4 9.0 tPZLVCC= 5.0 V, CL= 50 pF R1= R2= 500 , See figure 4 9 5.0 10.4 tPZH11.1 Output enable time, n G to nY tPZLVCC= 4.5 V and 5.5 V dc, CL= 50 pF R1= R2= 50

40、0 , See figure 4 10, 11 5.0 12.8 tPHZ3.0 7.4 tPLZVCC= 5.0 V, CL= 50 pF R1= R2= 500 , See figure 4 9 2.8 7.3 tPHZ9.4 Output disable time, n G to nY tPLZVCC= 4.5 V and 5.5 V dc, CL= 50 pF R1= R2= 500 , See figure 4 10, 11 2.8 9.9 ns 1. Not more than one output should be tested at one time and the dura

41、tion of the test condition shall not exceed one second. 2. Functional tests shall be conducted at input test conditions of 0.4 V VIL 0.8 V and 2.0 V VIH 2.4 V, for VCC= 4.5 V and repeated at VCC= 5.5 V. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,

42、-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90937 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 Case outline C and D 2 Case outline C and D 2 Terminal number Terminal symbol Terminal number Terminal symbol 1 1 G NC 11 4Y NC 2 1A 1 G 12 4A 3Y 3

43、 1Y 1A 13 4 G 3A 4 2 G 1Y 14 VCC3 G 5 2A NC 15 - NC 6 2Y 2 G 16 - 4Y 7 GND NC 17 - NC 8 3Y 2A 18 - 4A 9 3A 2Y 19 - 4 G 10 3 G GND 20 - VCCNC = No internal connection FIGURE 1. Terminal connections. Inputs Outputs G A Y L H H L L L H X Z H = High voltage level Z = High impedance L = Low voltage level

44、 X = Irrelevant FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90937 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 FIGURE 3. B

45、lock diagram. NOTES: 1. CL = 50 pF, includes probe and jig capacitance. 2. RL = R1 = r2 = 500 Test S1 tPLHOpen tPHLOpen tPZHOpen tPZLClosed tPHZOpen tPLZClosed FIGURE 4. Test circuit and switching waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IH

46、S-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90937 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97 NOTES: 1. Output with internal conditions such that the output is low except when disabled by the output control. 2. Output with internal cond

47、itions such that the output is high except when disabled by the output control. 3. All input pulses are supplied by the generators having the following characteristics: PRR 10 MHz, ZO= 50, tr 2.5 ns, tf 2.5 ns. 4. The outputs are measured one at a time with one transition per measurement. FIGURE 4.

48、Test circuit and switching waveforms - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90937 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 9 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device man

copyright@ 2008-2019 麦多课文库(www.mydoc123.com)网站版权所有
备案/许可证编号:苏ICP备17064731号-1