ImageVerifierCode 换一换
格式:PDF , 页数:13 ,大小:149.25KB ,
资源ID:699936      下载积分:10000 积分
快捷下载
登录下载
邮箱/手机:
温馨提示:
如需开发票,请勿充值!快捷下载时,用户名和密码都是您填写的邮箱或者手机号,方便查询和重复下载(系统自动生成)。
如填写123,账号就是123,密码也是123。
特别说明:
请自助下载,系统不会自动发送文件的哦; 如果您已付费,想二次下载,请登录后访问:我的下载记录
支付方式: 支付宝扫码支付 微信扫码支付   
注意:如需开发票,请勿充值!
验证码:   换一换

加入VIP,免费下载
 

温馨提示:由于个人手机设置不同,如果发现不能下载,请复制以下地址【http://www.mydoc123.com/d-699936.html】到电脑端继续下载(重复下载不扣费)。

已注册用户请登录:
账号:
密码:
验证码:   换一换
  忘记密码?
三方登录: 微信登录  

下载须知

1: 本站所有资源如无特殊说明,都需要本地电脑安装OFFICE2007和PDF阅读器。
2: 试题试卷类文档,如果标题没有明确说明有答案则都视为没有答案,请知晓。
3: 文件的所有权益归上传用户所有。
4. 未经权益所有人同意不得将文件中的内容挪作商业或盈利用途。
5. 本站仅提供交流平台,并不能对任何下载内容负责。
6. 下载文件中如有侵权或不适当内容,请与我们联系,我们立即纠正。
7. 本站不保证下载资源的准确性、安全性和完整性, 同时也不承担用户因使用这些下载资源对自己和他人造成任何形式的伤害或损失。

版权提示 | 免责声明

本文(DLA SMD-5962-90939 REV D-2013 MICROCIRCUIT DIGITAL BIPOLAR CMOS OCTAL BUFFER AND LINE DRIVER MOS DRIVER WITH INVERTED THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf)为本站会员(赵齐羽)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-90939 REV D-2013 MICROCIRCUIT DIGITAL BIPOLAR CMOS OCTAL BUFFER AND LINE DRIVER MOS DRIVER WITH INVERTED THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R277-92. WLM 92-08-28 Monica L. Poelking B Changes in accordance with NOR 5962-R001-93. - WLM 92-10-16 Monica L. Poelking C Correct title to accurately describe device function. Update boilerplate to MIL-PRF-38

2、535 requirements. Editorial changes throughout. LTG 06-10-11 Thomas M. Hess D Update boilerplate paragraphs to the current MIL-PRF-38535 requirements. - LTG 13-11-22 Thomas M. Hess REV SHEET REV SHEET REV STATUS REV D D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED

3、 BY Marcia B. Kelleher DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY Thomas J. Ricciuti APPROVED BY Michael A. Frye MIC

4、ROCIRCUIT, DIGITAL, BIPOLAR CMOS, OCTAL BUFFER AND LINE DRIVER/MOS DRIVER WITH INVERTED THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON DRAWING APPROVAL DATE 90-12-21 REVISION LEVEL D SIZE A CAGE CODE 67268 5962-90939 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E047-14 Provided by IHSNot

5、 for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90939 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels

6、 consisting of high reliability (device class Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in th

7、e PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 90939 01 M R A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device c

8、lasses Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-R

9、HA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54BCT2240 Octal buffer and line driver/MOS driver with inverted three-state outputs, TTL compatible inputs 1.2.3 Device class designator. The device class desi

10、gnator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certificatio

11、n and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line S GDFP2-F20 or CDFP3-F20 20 Flat pack 2 CQCC1-N20 20 Square chip ca

12、rrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90939 DLA

13、LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC Input voltage range (VIN) -0.5 V dc to +7.0 V dc Voltage applied to any output in the high state (VOUT) . -0.5 V dc to VCCV

14、oltage applied to any output in the disabled three-state output (VOUT) . -0.5 V dc to +5.5 V dc Current into any output in the low state . 96 mA Input clamp current (IIC) . -30 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD) . 495 mW 2/ Lead temperature (soldering,

15、 10 seconds) +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Minimum high level input voltage (VIH) . 2.0 V dc Maximum low level input voltage (VIL) . 0.8 V dc C

16、ase operating temperature range (TC) . -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these docum

17、ents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Comp

18、onent Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/quicksearch.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue,

19、 Building 4D, Philadelphia, PA 19111-5094). 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific

20、 exemption has been obtained. 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Must be able to withstand the additional PDdue to the short circuit test, e.g., IOS. The P

21、Dlimit is based upon dc values. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90939 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item re

22、quirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 as specified herein, or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described her

23、ein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-

24、PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table.

25、The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.3 Electrical performance characteristics and postirra

26、diation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements

27、shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not

28、feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be

29、in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate o

30、f compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be

31、 listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the require

32、ments of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided

33、 with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DLA Land and Maritime-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing

34、. 3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore a

35、t the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 126 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS

36、-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90939 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Test conditions -55C TC +125C unless otherwise specified Group A subgroups Device type Limi

37、ts Unit Min Max High level output voltage VOHVCC= 4.5 V VIH= 2.0 V VIL= 0.8 V IOH= -1 mA 1, 2, 3 All 2.4 V IOH= -12 mA 2.0 Low level output voltage VOLVCC= 4.5 V VIH= 2.0 V VIL= 0.8 V IOL= 1 mA 1, 2, 3 All 0.5 V IOL= 12 mA 0.8 Input clamp voltage VICVCC= 4.5 V, IIN= -18 mA 1, 2, 3 All -1.2 V High le

38、vel input current IIH1VCC= 5.5 V, VIN= 5.5 V 1, 2, 3 All 0.1 mA IIH2VCC= 5.5 V, VIN= 2.7 V 20 A Low level input current IILVCC= 5.5 V, VIN= 0.5 V 1, 2, 3 All -1.0 mA Supply current, outputs high ICCHVCC= 5.5 V Outputs open 1, 2, 3 All 33 mA Supply current, outputs low ICCL76 Supply current, outputs

39、disabled ICCZ8 Off-state output leakage current, high IOZHVCC= 5.5 V VOUT= 2.7 V 1, 2, 3 All 50 A Off-state output leakage current, low IOZLVOUT= 0.5 V -50 Short circuit output current 1/ IOSVCC= 5.5 V, VOUT0.0 V 1, 2, 3 All -100 -225 mA Functional tests 2/ See 4.4.1b 7, 8 All Propagation delay time

40、, mAn to mYn tPLHCL= 50 pF R1 = R2 = 500 See figure 4 VCC= 5.0 V 9 All 0.5 4.8 ns VCC= 4.5 V and 5.5 V 10, 11 0.5 6.3 tPHLVCC= 5.0 V 9 All 0.5 4.0 VCC= 4.5 V and 5.5 V 10, 11 0.5 4.6 Propagation delay time, output enable, mOE to mYn tPZHVCC= 5.0 V 9 All 2.6 8.2 ns VCC= 4.5 V and 5.5 V 10, 11 2.6 10.

41、1 tPZLVCC= 5.0 V 9 All 4.3 10.9 VCC= 4.5 V and 5.5 V 10, 11 4.3 12.9 Propagation delay time, output disable, mOE to mYn tPHZVCC= 5.0 V 9 All 2.0 7.1 ns VCC= 4.5 V and 5.5 V 10, 11 2.0 9.2 tPLZVCC= 5.0 V 9 All 2.2 8.5 VCC= 4.5 V and 5.5 V 10, 11 2.2 12.2 1/ Not more than one output should be shorted

42、at one time, and the duration of the short circuit should not exceed one second. 2/ Functional tests shall be conducted at input test conditions of 0.4 V VIL 0.8 V and 2.0 V VIH 2.4 V for VCC= 4.5 V and is repeated for VCC= 5.5 V. Provided by IHSNot for ResaleNo reproduction or networking permitted

43、without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90939 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 6 DSCC FORM 2234 APR 97 Device type All Case outlines R, S, and 2 Terminal number Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 1OE

44、 1A1 2Y4 1A 2Y3 1A3 2Y2 1A4 2Y1 GND 2A1 1Y4 2A2 1Y3 2A3 1Y3 2A4 1Y1 2OE VCC FIGURE 1. Terminal connections. Output enable control inputs Data inputs Outputs mOE mAn mYn H X Z L L H L H L H = High voltage level L = Low voltage level X = Irrelevant Z = High impedance FIGURE 2. Truth table. Provided by

45、 IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90939 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction

46、or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90939 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 8 DSCC FORM 2234 APR 97 FIGURE 4. Switching waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networki

47、ng permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90939 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 9 DSCC FORM 2234 APR 97 NOTES: 1. When measuring tPLZ and tPZL: S1 = 7.0 V. When measuring tPLH, tPHL, tPZH, and tPHZ: S1 = Open. 2. The tP

48、ZLand tPLZreference waveform is for the output under test with internal conditions such that the output is at VOLexcept when disabled by the output enable control. The tPZHand tPHZreference waveform is for the output under test with internal conditions such that the output is at VOHexcept when disabled by the output enable control. 3. CL= 50 pF minimum or equivalent (includes test jig and probe capacitance). 4. R1 = R2 = 500 or equivalent. 5. All input pulses are supplied by the generators having the following characteristics: V

copyright@ 2008-2019 麦多课文库(www.mydoc123.com)网站版权所有
备案/许可证编号:苏ICP备17064731号-1