ImageVerifierCode 换一换
格式:PDF , 页数:11 ,大小:92.79KB ,
资源ID:699976      下载积分:10000 积分
快捷下载
登录下载
邮箱/手机:
温馨提示:
如需开发票,请勿充值!快捷下载时,用户名和密码都是您填写的邮箱或者手机号,方便查询和重复下载(系统自动生成)。
如填写123,账号就是123,密码也是123。
特别说明:
请自助下载,系统不会自动发送文件的哦; 如果您已付费,想二次下载,请登录后访问:我的下载记录
支付方式: 支付宝扫码支付 微信扫码支付   
注意:如需开发票,请勿充值!
验证码:   换一换

加入VIP,免费下载
 

温馨提示:由于个人手机设置不同,如果发现不能下载,请复制以下地址【http://www.mydoc123.com/d-699976.html】到电脑端继续下载(重复下载不扣费)。

已注册用户请登录:
账号:
密码:
验证码:   换一换
  忘记密码?
三方登录: 微信登录  

下载须知

1: 本站所有资源如无特殊说明,都需要本地电脑安装OFFICE2007和PDF阅读器。
2: 试题试卷类文档,如果标题没有明确说明有答案则都视为没有答案,请知晓。
3: 文件的所有权益归上传用户所有。
4. 未经权益所有人同意不得将文件中的内容挪作商业或盈利用途。
5. 本站仅提供交流平台,并不能对任何下载内容负责。
6. 下载文件中如有侵权或不适当内容,请与我们联系,我们立即纠正。
7. 本站不保证下载资源的准确性、安全性和完整性, 同时也不承担用户因使用这些下载资源对自己和他人造成任何形式的伤害或损失。

版权提示 | 免责声明

本文(DLA SMD-5962-91532 REV D-2013 MICROCIRCUIT LINEAR CMOS DUAL LOW POWER VOLTAGE COMPARATOR MONOLITHIC SILICON.pdf)为本站会员(livefirmly316)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-91532 REV D-2013 MICROCIRCUIT LINEAR CMOS DUAL LOW POWER VOLTAGE COMPARATOR MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Make change to interim electricals as specified in TABLE II. In accordance with N.O.R. 5962-R042-96. 96-01-17 M. A. FRYE B Add case outline H and device type 02. Make changes to 1.2.2, 1.3, 1.4, TABLE I, and FIGURE 1. ro 97-08-01 R. MONNIN C Repl

2、aced reference to MIL-STD-973 with reference to MIL-PRF-38535. - ro 04-10-06 R. MONNIN D Update drawing to current MIL-PRF-38535 requirements. Removed class M references. -rrp 13-07-11 C. SAFFLE REV SHEET REV SHEET REV STATUS REV D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREP

3、ARED BY RAJESH PITHADIA DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY RAJESH PITHADIA APPROVED BY MICHAEL FRYE MICROCIRCUIT, LIN

4、EAR, CMOS, DUAL, LOW POWER, VOLTAGE COMPARATOR, MONOLITHIC SILICON DRAWING APPROVAL DATE 95-10-11 AMSC N/A REVISION LEVEL D SIZE A CAGE CODE 67268 5962-91532 SHEET 1 OF 10 DSCC FORM 2233 APR 97 5962-E393-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS

5、-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91532 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q) and space application (dev

6、ice class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 91532 01 Q P

7、 A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and

8、 are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 3702 Dual, low power, voltage comparator 02 3702 Dual, low power, voltage comparat

9、or 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in

10、MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style H GDFP1-F10 or CDFP2-F10 10 Flat pack P GDIP1-T8 or CDIP2-T8 8 Dual in line 2 CQCC1-N20 20 Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q

11、and V. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91532 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage rang

12、e (VDD) . -0.3 V to 18 V 2/ Differential input voltage 18 V 3/ Input voltage range (VIN) . -0.3 V to VDDOutput voltage range (VOUT) . -0.3 V to VDDInput current (IIN) . 5 mA Output current (IOUT), each output 20 mA Total current into VDDterminal 40 mA Total current out of ground terminal . 40 mA Sto

13、rage temperature range -65C to +150C Lead temperature (soldering, 10 seconds) . 300C Junction temperature (TJ) +150C Power dissipation (PD): 4/ Case H . 675 mW Case P 1050 mW Case 2 1375 mW Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Thermal resistance, junction-to-ambient (JA): Cas

14、es H and P . 180C/W Case 2 65C/W 1.4 Recommended operating conditions. Supply voltage range: Device type 01 4 V VDD 16 V Device type 02 2.5 V VDD 5.5 V Common mode input voltage (VIC) 0 V VIC VDD- 1.5 V High level output current -20 mA Low level output current . 20 mA Ambient operating temperature r

15、ange (TA) -55C to +125C 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ All voltage values, except differential voltages, are with respect to network ground. 3/ Differe

16、ntial voltages are at the noninverting input with respect to the inverting input. 4/ The derating factor for case H shall be 5.4 mW/C above TA= +25C, case P shall be 8.4 mW/C above TA= +25C, and for case 2 shall be 11.0 mW/C above TA= +25C. Provided by IHSNot for ResaleNo reproduction or networking

17、permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91532 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards

18、, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DE

19、PARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these

20、 documents are available online at http:/quicksearch.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text

21、of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535

22、as specified herein, or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be

23、 as specified in MIL-PRF-38535 and herein for device classes Q and V. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.3 Electrical performance characteristics and postirradiatio

24、n parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall

25、be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasib

26、le due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. 3.5.1 Certification/compliance mark. The c

27、ertification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see

28、 6.6.1 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein. 3.7 Certificate of confor

29、mance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91532 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVE

30、L D SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max Input offset voltage VIOVIC= VICRmin, 2/ VDD= 5 V to 10 V, TA= +25C 1 01 5 mV VIC= VICRmin, 2/ 1 02

31、8 VDD= 3.0 V 2,3 10 Input offset current IIOVIC= 2.5 V, TA= +125C 2 01 15 nA VIC= 1.0 V, TA= +125C 02 15 Input bias current IIBVIC= 2.5 V, TA= +125C 2 01 30 nA VIC= 1.0 V, TA= +125C 02 30 Common mode input voltage range VICR1 All 0 to VDD- 1 V 2,3 0 to VDD- 1.5 High level output voltage VOHVID= +1 V

32、, IOH= -4 mA 1 01 4.5 V 2,3 4.2 VID= +1 V, IOH= -2 mA 1,2,3 02 2.6 Low level output voltage VOLVID= -1 V, IOH= -4 mA 1 01 300 mV 2,3 500 VID= -1 V, IOH= +2 mA 1 02 300 2,3 500 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS

33、-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91532 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions 1/ -55C TA +125C unless otherwise specified Group A subgroups Device t

34、ype Limits Unit Min Max Supply current (both comparators) IDDNo load, outputs low 1 01 40 A 2,3 90 1 02 35 2,3 70 Common mode rejection ratio CMRR VICR= VICRmin 1,2,3 02 60 dB Supply voltage 3/ rejection ratio kSVRVDD= 3.0 V to 5.0 V 1,2,3 02 60 dB Propagation delay time 4/ low to high tPLHOverdrive

35、 = 5 mV, f = 10 kHz, CL= 100 pF 9 02 4.7 s Overdrive = 10 mV, f = 10 kHz, CL= 100 pF 9 3.2 VI= 1.4 V step at +INPUT 9 2.2 Propagation delay time 4/ high to low tPHLOverdrive = 5 mV, f = 10 kHz, CL= 100 pF 9 02 3.6 s Overdrive = 10 mV, f = 10 kHz, CL= 100 pF 9 2.8 VI= 1.4 V step at +INPUT 9 0.3 1/ Un

36、less otherwise specified; for device type 01, VDD= 5 V, VIC= 0 V and for device type 02, VDD= 3 V, VIC= 0 V. 2/ The offset voltage limits given are the maximum values required to drive the output up to VOHmin or down to 0.3 V. 3/ If not tested, shall be guaranteed to the limits specified in table I

37、herein. 4/ The capacitance includes probe and jig capacitance. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91532 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR

38、 97 Device types 01 and 02 Case outlines H P 2 Terminal number Terminal symbol 1 NC OUTPUT NC 2 OUTPUT 1 -INPUT 1 OUTPUT 1 3 -INPUT 1 +INPUT NC 4 +INPUT 1 GND NC 5 GND +INPUT 2 -INPUT 1 6 +INPUT 2 -INPUT 2 NC 7 -INPUT 2 OUTPUT 2 +INPUT 1 8 OUTPUT 2 VDDNC 9 VDD- NC 10 NC - GND 11 - - NC 12 - - +INPUT

39、 2 13 - - NC 14 - - NC 15 - - -INPUT 2 16 - - NC 17 - - OUTPUT 2 18 - - NC 19 - - NC 20 - - VDDNC = No connection FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91532 DLA LAND

40、 AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 8 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturers Quality Management (

41、QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspectio

42、n. 4.2.1 Additional criteria for device classes Q and V. a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturers QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under document

43、 revision level control of the device manufacturers Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in acc

44、ordance with the intent specified in method 1015 of MIL-STD-883. b. Interim and final electrical test parameters shall be as specified in table II herein. c. Additional screening for device class V beyond the requirements of device class Q shall be as specified in MIL-PRF-38535, appendix B. 4.3 Qual

45、ification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). 4.4 Con

46、formance inspection. Technology conformance inspection for classes Q and V shall be in accordance with MIL-PRF-38535 including groups A, B, C, D, and E inspections, and as specified herein. 4.4.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 4, 5, 6, 7, 8, 10, a

47、nd 11 in table I, method 5005 of MIL-STD-883 shall be omitted. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91532 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 9 DSCC FORM 2234 APR

48、 97 TABLE II. Electrical test requirements. Test requirements Subgroups (in accordance with MIL-STD-883, method 5005, table I) Subgroups (in accordance with MIL-PRF-38535, table III) Device class M Device class Q Device class V Interim electrical parameters (see 4.2) 1 - 1 Final electrical parameters (see 4.2) 1,2,3 1/ 1,2,3 1/ 1,2,3 1/ Group A test requirements (see 4.4) 1,2,3,9 1,2,3,9 1

copyright@ 2008-2019 麦多课文库(www.mydoc123.com)网站版权所有
备案/许可证编号:苏ICP备17064731号-1