DLA SMD-5962-91631 REV A-2006 MICROCIRCUIT LINEAR TIMER MONOLITHIC SILICON《硅单块 时间传感器 直线式微型电路》.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Drawing updated to reflect current requirements. -rrp 06-11-13 R. MONNIN REV SHET REV SHET REV STATUS REV A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY RICK C. OFFICER DEFENSE SUPPLY CENTER COLUMBUS STANDARD M

2、ICROCIRCUIT DRAWING CHECKED BY CHARLES E. BESORE COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY MICHAEL A. FRYE MICROCIRCUIT, LINEAR, TIMER, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 92-05-27

3、AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-91631 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E181-06 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91631 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO

4、 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are r

5、eflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 91631 01 M I A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.

6、2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices

7、 meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 LM122 Precision Timer

8、1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordanc

9、e with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style I MACY1-X10 2 Can 1.2.5 Lead finish. The lead finish is

10、as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91631 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43

11、218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Positive supply voltage (VCC) 40 V dc Collector output voltage 40 V dc VREFcurrent 5 mA TRIGGER voltage 40 V dc VADJvoltage (forced). 5 V dc Output short circuit duration 2/ LOGIC reverse voltage. 5.5 V dc Stora

12、ge temperature range. -65C to +150C Lead temperature (soldering, 10 seconds) . +260C Junction temperature (TJ) +150C Power dissipation (PD) . 500 mW Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Thermal resistance, junction-to-ambient (JA) (still air) +175C 1.4 Recommended operating con

13、ditions. Positive supply voltage range (VCC) +4.5 V dc to +40 V dc TRIGGER width (VTRIGGER= 3 V) 0.25 s (typical) Average temperature coefficient of timing ratio . 0.003 (typical) Capacitor saturation voltage: RT 1 M . 2.5 V (typical) RT 10 k . 25 V(typical) Ambient operating temperature range (TA).

14、 -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitati

15、on or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEF

16、ENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Ave

17、nue, Building 4D, Philadelphia, PA 19111-5094.) 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Continuous output shorts are not allowed. Short circuit duration at ambi

18、ent temperatures up to +40C may be calculated from t = 120/VCEseconds, where VCEis the collector to emitter voltage across the output transistor during the short. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 59

19、62-91631 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document,

20、however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufac

21、turers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3

22、.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outline shall be in accordance wi

23、th 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Logic diagram. The logic diagram shall be as specified on figure 2. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the e

24、lectrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical te

25、sts for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the opt

26、ion of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certificati

27、on/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of comp

28、liance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.

29、6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL

30、-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of c

31、hange for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the

32、acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing

33、 shall be in microcircuit group number 54 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91631 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET

34、 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TA +125C VCC= 4.5 V unless otherwise specified Group A subgroups Device type Limits Unit Min Max Supply current ICCVCC= 40 V 1, 2 01 4 mA 3 5 VCC= 4.5 V, TA= +25C 1 4 TRIGGER current ITRIGGERVCC= 40

35、 V, VTRIGGER= -40 V 1 01 -10 A 2, 3 -15 CC= 40 V, VTRIGGER= 2.5 V 1, 2 120 3 200 CC= 40 V, VTRIGGER= 40 V 1, 2 1.5 mA 3 2.7 TRIGGER voltage VTRIGGER4.5 V VCC 40 V 1 01 1.2 2.0 V 2, 3 0.8 2.5 Comparator input current ICINVCC= 40 V, TA= +25C, VIN= 1.8 V 1 01 -1 1 nA CC= 40 V, VIN= 0.2 V 1 -1 1 2, 3 -5

36、 5 CC= 40 V, BOOST pin tied to VCC, VIN= 0.2 V 1, 2, 3 -100 VCC= 40 V, TA= +25C, VIN= 1.8 V 1 -1 1 Reference voltage VREFVCC= 40 V, VCC= 4.5 V, TA= +25C 1 01 3 3.3 V Reference regulation 4.5 V VCC 40 V 1, 2, 3 01 -25 25 mV 0 IL 3 mA, RL= Infinity -50 50 Output leakage current ILEAKVCC= 40 V, VCE= 40

37、 V 1, 2, 3 01 -1 1 A Emitter saturation voltage VESATVCC= 5 V, IE= 3 mA, TA= +25C 1 01 2.2 V VCC= 5 V, IE= 50 mA, TA= +25C 3.0 Collector saturation voltage VCSATVCC= 5 V, IC= 8 mA 1, 2, 3 01 0.4 V CC= 5 V, IC= 50 mA 1.4 Provided by IHSNot for ResaleNo reproduction or networking permitted without lic

38、ense from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91631 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions -55C TA +125C VCC= 4.5 V unless otherwise specif

39、ied Group A subgroups Device type Limits Unit Min Max Timing ratio Rt1 VCC= 4.5 V, 1/ measured at VADJ VR/C, BOOST pin = open 1 01 -17 17 mV 2, 3 -30 30 Rt2 VCC= 40 V, 1/ measured at VADJ VR/C, BOOST pin tied to VCC1 -17 17 2, 3 -30 30 1/ Timing ratio limits = 0.626 minimum and 0.638 maximum at TA=

40、=25C; 0.62 minimum and 0.644 maximum at TA= +125C and -55C. Timing ratio is indirectly determined by the VADJand VR/Cvoltage differential. Timing ratio: (2 V Rt1)/VREFand (2 V Rt2)/VREF. 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall

41、 be in accordance with MIL-PRF-38535 or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38

42、535, appendix A. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance with method 5004 of MIL-STD-883, a

43、nd shall be conducted on all devices prior to quality conformance inspection. 4.2.1 Additional criteria for device class M. a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control an

44、d shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015. (2) TA= +125C, minimum. b. Interim and final electrical test parame

45、ters shall be as specified in table II herein. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91631 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 Dev

46、ice type 01 Case outline I Terminal number Terminal symbol 1 LOGIC 2 TRIGGER 3 VREF4 R/C 5 GND 6 VADJ7 VCC8 BOOST 9 COLLECTOR 10 EMITTER FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZ

47、E A 5962-91631 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 8 DSCC FORM 2234 APR 97 NOTES: 1. Values of RTand CTdepend on the application specified by the user. 2. Non-inverting latching buffer (output latches high when driven to the high State if TRIGGER is low-ou

48、tput unlatches if TRIGGER is pulsed high). FIGURE 2. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91631 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 9 DSCC FORM 2234 APR 97 4.2.2 Additional criteria for device classes Q and V. a. The burn-in test duration, test condition and test temperature, or approv