DLA SMD-5962-91662 REV B-2006 MICROCIRCUIT MEMORY DIGITAL CMOS 4K X 16 DUAL PORT STATIC RANDOM ACCESS MEMORY (SRAM) MONOLITHIC SILICON《硅单块 4K X 16双门静态随机存取存储器 数字主储存器微型电路》.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Updated boilerplate. Sheet 6, changed ICC2from 85 mA to 90 mA. Sheet 17, changed R/ WRand CERfrom L to X for function Reset Left INTLFlag. Added device types 09-12. - glg 99-04-19 Raymond Monnin B Boilerplate update and part of five year review.

2、tcr 06-11-14 Raymond Monnin THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. REV SHEET REV B B B B B B B B B B B B B B B B B SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARE

3、D BY Jeff Bowling DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Jeff Bowling COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 4K X 16 DUAL PORT STATIC RANDO

4、M ACCESS MEMORY (SRAM), MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 93-04-13 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-91662 SHEET 1 OF 31 DSCC FORM 2233 APR 97 5962-E599-06 Provided by IHSNot for ResaleNo reproduction or networking permitted withou

5、t license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91662 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes

6、Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the fo

7、llowing example: 5962 - 91662 01 M X X Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-

8、PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device typ

9、e(s) identify the circuit function as follows: Device type Generic number Circuit function Data retention Access time 01 7024 4K X 16 Dual port SRAM No 70 ns 02 7024 4K X 16 Dual port SRAM Yes 70 ns 03 7024 4K X 16 Dual port SRAM No 55 ns 04 7024 4K X 16 Dual port SRAM Yes 55 ns 05 7024 4K X 16 Dual

10、 port SRAM No 45 ns 06 7024 4K X 16 Dual port SRAM Yes 45 ns 07 7024 4K X 16 Dual port SRAM No 35 ns 08 7024 4K X 16 Dual port SRAM Yes 35 ns 09 7024 4K X 16 Dual port SRAM No 25 ns 10 7024 4K X 16 Dual port SRAM Yes 25 ns 11 7024 4K X 16 Dual port SRAM No 20 ns 12 7024 4K X 16 Dual port SRAM Yes 20

11、 ns 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accor

12、dance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X CMGA15-PN 84 Pin grid array Y See figure 1 84 Flat

13、pack Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91662 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.2.5 Lead finish. The lead finish is as spec

14、ified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1.3 Absolute maximum ratings. 1/ 2/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc Storage temperature range . -65C to +150C DC output current 50 mA Maximum power dissipation (PD). 2.2 W Lead temper

15、ature (soldering, 10 seconds) +260C Thermal resistance, junction-to-case (JC): Case X. See MIL-STD-1835 Case Y. 20C/W Maximum junction temperature (TJ) +150C 3/ DC input voltage range -0.5 V dc to VCC+ 0.5 V dc 4/ DC output voltage range -0.5 V dc to VCC+ 0.5 V dc 4/ Output voltage applied in high Z

16、 state. -0.5 V dc to VCC+ 0.5 V dc 1.4 Recommended operating conditions. Supply voltage range (VCC). 4.5 V dc minimum to 5.5 V dc maximum High level input voltage range (VIH) 2.2 V dc to 6.0 V dc Low level input voltage range (VIL) . -0.5 V dc to +0.8 V dc Case operating temperature range (TC) . -55

17、C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation o

18、r contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE

19、 HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue,

20、 Building 4D, Philadelphia, PA 19111-5094.) 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ All voltages referenced to GND unless otherwise specified. 3/ Maximum juncti

21、on temperature shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. 4/ Negative undershoots to a minimum of -3.0 V are allowed with a maximum of 20 ns pulse width. Provided by IHSNot for ResaleNo reproduction or network

22、ing permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91662 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 2.2 Non-Government publications. The following documents form a part of this document to the extent speci

23、fied herein. Unless otherwise specified, the issues of the documents are the issues of the documents cited in the solicitation. ELECTRONICS INDUSTRIES ALLIANCE (EIA) JEDEC Standard EIA/JESD 78 - IC Latch-Up Test. (Applications for copies should be addressed to the Electronics Industries Alliance, 25

24、00 Wilson Boulevard, Arlington, VA 22201; http:/www.jedec.org.) AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM) ASTM Standard F1192-00 - Standard Guide for the Measurement of Single Event Phenomena Induced by Heavy Ion Irradiation of Semiconductor Devices. (Applications for copies of ASTM publicat

25、ions should be addressed to: ASTM International, PO Box C700, 100 Barr Harbor Drive, West Conshohocken, PA 19428-2959; http:/www.astm.org.) (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents also ma

26、y be available in or through libraries or other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and

27、regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The

28、 modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical di

29、mensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1. 3.2.2

30、 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Truth table. The truth table shall be as specified on figure 3. 3.2.4 Functional tests. Various functional tests used to test this device are contained in the appendix. If the test patterns cannot be implemented

31、 due to test equipment limitations, alternate test patterns to accomplish the same results shall be allowed. For device class M, alternate test patterns shall be maintained under document revision level control by the manufacturer and shall be made available to the preparing or acquiring activity up

32、on request. For device classes Q and V alternate test patterns shall be under the control of the device manufacturers Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the preparing or acquiring activity upon request. 3.3 Electrical performance characteris

33、tics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. Provided by IHSNot for ResaleNo reproduction or ne

34、tworking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91662 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified

35、in table IIA. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitation

36、s, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535

37、, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes

38、 Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of

39、 supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device c

40、lass M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this

41、 drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class

42、 M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M

43、devices covered by this drawing shall be in microcircuit group number 41 (see MIL-PRF-38535, appendix A). 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturers Q

44、uality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. For device classes Q and V, screening shall be in

45、 accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. 4.2

46、.1 Additional criteria for device class M. a. Delete the sequence specified as initial (preburn-in) electrical parameters through interim (postburn-in) electrical parameters of method 5004 and substitute lines 1 through 6 of table IIA herein. b. The test circuit shall be maintained by the manufactur

47、er under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015. (1) Dynamic burn-in (method 1015 of MIL-STD-883, test condition D; for circuit, see 4.2.1b herein). c. Interim and final electrical parameters shall be as specified in table IIA herein. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STA