ImageVerifierCode 换一换
格式:PDF , 页数:18 ,大小:115.22KB ,
资源ID:700052      下载积分:10000 积分
快捷下载
登录下载
邮箱/手机:
温馨提示:
如需开发票,请勿充值!快捷下载时,用户名和密码都是您填写的邮箱或者手机号,方便查询和重复下载(系统自动生成)。
如填写123,账号就是123,密码也是123。
特别说明:
请自助下载,系统不会自动发送文件的哦; 如果您已付费,想二次下载,请登录后访问:我的下载记录
支付方式: 支付宝扫码支付 微信扫码支付   
注意:如需开发票,请勿充值!
验证码:   换一换

加入VIP,免费下载
 

温馨提示:由于个人手机设置不同,如果发现不能下载,请复制以下地址【http://www.mydoc123.com/d-700052.html】到电脑端继续下载(重复下载不扣费)。

已注册用户请登录:
账号:
密码:
验证码:   换一换
  忘记密码?
三方登录: 微信登录  

下载须知

1: 本站所有资源如无特殊说明,都需要本地电脑安装OFFICE2007和PDF阅读器。
2: 试题试卷类文档,如果标题没有明确说明有答案则都视为没有答案,请知晓。
3: 文件的所有权益归上传用户所有。
4. 未经权益所有人同意不得将文件中的内容挪作商业或盈利用途。
5. 本站仅提供交流平台,并不能对任何下载内容负责。
6. 下载文件中如有侵权或不适当内容,请与我们联系,我们立即纠正。
7. 本站不保证下载资源的准确性、安全性和完整性, 同时也不承担用户因使用这些下载资源对自己和他人造成任何形式的伤害或损失。

版权提示 | 免责声明

本文(DLA SMD-5962-91691 REV A-2002 MICROCIRCUIT LINEAR ANALOG-TO-DIGITAL CONVERTER 16-BIT MONOLITHIC SILICON《硅单块 16比特模拟数字转换器 直线式微型电路》.pdf)为本站会员(proposalcash356)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-91691 REV A-2002 MICROCIRCUIT LINEAR ANALOG-TO-DIGITAL CONVERTER 16-BIT MONOLITHIC SILICON《硅单块 16比特模拟数字转换器 直线式微型电路》.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Drawing updated to reflect current requirements. - gt 02-07-03 Raymond Monnin THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED REV SHET REV A A A SHET 15 16 17 REV STATUS REV A A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9

2、 10 11 12 13 14 PMIC N/A PREPARED BY Dan Wonnell DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Sandra Rooney COLUMBUS, OHIO 43216 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, LINEAR, ANALOG-TO-DIGITAL

3、CONVERTER,16-BIT, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 92-09-15 AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-91691 SHEET 1 OF 17 DSCC FORM 2233 APR 97 5962-E458-02 DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.

4、Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91691 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two pro

5、duct assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (R

6、HA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 91691 01 M X X Federal stock class designator RHA designator (see 1.2.1) Devicetype (see 1.2.2) Device class designator Caseoutline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.

7、2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator.

8、A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function Linearity error 01 CS5101A-SD 16-Bit, 100 kHz Analog to Digital Converter 3.0 LSB 02 CS5101A-TD 16-Bit, 100 kHz Analog to Digital Conv

9、erter 2.0 LSB 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuit

10、s in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X GDIP1-T28 or CDIP2-T28 28 Dual-in-line 3

11、 CQCC1-N28 28 Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROC

12、IRCUIT DRAWING SIZE A 5962-91691 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Positive digital supply voltage range (VD+)-0.3 V dc to 6.0 V dc 2/ Negative digital supply voltage range (VD-).+0.3 V dc to -6.0

13、V dc Positive analog supply voltage range (VA+) -0.3 V dc to 6.0 V dc Negative analog supply voltage range (VA-)+0.3 V dc to -6.0 V dc Input current, any pin except supplies .10 mA 3/ Analog input voltage range (AIN and VREFpins)(VA-) - 0.3 V dc to (VA+) + 0.3 V dc Digital input voltage range.-0.3 V

14、 dc to (VD+) + 0.3 V dc Storage temperature range .-65C to +150C Lead temperature (soldering 10 seconds).+260C Junction temperature (TJ)+160C Thermal resistance, junction-to-case (JC) .See MIL-STD-1835 Thermal resistance, junction-to-ambient (JA) Case X.40C/W Case 360C/W Power dissipation 480 mW 1.4

15、 Recommended operating conditions. 4/ Ambient operating temperature range (TA) .-55C to +125C Positive digital supply voltage range (VD+)+4.50 V dc to VA+Negative digital supply voltage range (VD-).-4.50 V dc to 5.50 V dc Positive analog supply voltage range (VA+) +4.50 V dc to +5.50 V dc Negative a

16、nalog supply voltage range (VA-)-4.50 V dc to 5.50 V dc Analog reference voltage range (VREF)+2.50 V dc to (VA+) - 0.5 V dc Analog input voltage range: UnipolarAGND to VREFBipolar-VREFto VREF1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at

17、 the maximum levels may degrade performance and affect reliability. 2/ In addition, VD+must not be greater than (VA+) + 0.3 V dc. 3/ Transient currents of up to 100 mA will not cause latch-up. 4/ All voltages referenced to AGND and DGND tied together.Provided by IHSNot for ResaleNo reproduction or n

18、etworking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91691 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following speci

19、fication, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the soli

20、citation. SPECIFICATION DEPARTMENT OF DEFENSE MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. STANDARDS DEPARTMENT OF DEFENSE MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. HANDBOOKS DEPARTMENT OF

21、 DEFENSE MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia,

22、 PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtaine

23、d. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form,

24、fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensi

25、ons shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified

26、 on figure 1. 3.2.3 Block diagram. The block diagrams shall be as specified on figure 2. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specifie

27、d in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. Provided by IHSNot for ResaleNo reproduction

28、 or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91691 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manu

29、facturers PIN may also be marked as listed in MIL-HDBK-103. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be

30、 marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML” or “Q” as required in MIL-P

31、RF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawi

32、ng (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply f

33、or this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for de

34、vice classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involv

35、ing devices acquired to this drawing is required for any change as defined in MIL-PRF-38535, appendix A. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required do

36、cumentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 81 (see MIL-PRF-38535, appendix A). 4. QUALITY ASSURANCE PROV

37、ISIONS 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as describ

38、ed herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conform

39、ance inspection. For device class M, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. 4.2.1 Additional criteria for device class M. a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition D. The t

40、est circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent s

41、pecified in test method 1015. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91691 DEFENSE SU

42、PPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TA +125C unless otherwise specified Group A subgroups Device type Limits 1/ Unit Min Max Resolution for which no missing codes is

43、 guaranteed RES 2/ 3/ 1, 2, 3 All 16 Bits Integral linearity error INL 2/ 1, 2, 3 01 3.0 LSB 02 2.0 Full-scale error FSE 2/ 1, 2, 3 01 5.0 LSB 02 4.0 Full-scale error drift dFSE/dt 2/ 4/ 5/ 2, 3 All 5.0 LSB Unipolar offset error VOFF 2/ 1, 2, 3 01 5.0 LSB 02 4.0 Unipolar offset error drift dVOFF/dt

44、2/ 4/ 5/ 2, 3 All 6.0 LSB Bipolar offset error BOFF 2/ 1, 2, 3 01 5.0 LSB 02 3.0 Bipolar offset error drift dBOFF/dt 2/ 4/ 5/ 2, 3 All 5.0 LSB Bipolar negative full-scale error BNFSE 2/ 1, 2, 3 01 5.0 LSB 02 3.0 Bipolar negative full-scale error drift dBNFSE/dt 2/ 4/ 5/ 2, 3 All 2.0 LSB Digital inpu

45、t voltage VIH6/ 7/ 1, 2, 3 All 2.0 V VIL0.8 Digital input current IIN6/ 7/ 1, 2, 3 All 10 A Digital output voltage VOLLogic “0”, 6/ 7/ ISINK= -1.6 mA 1, 2, 3 All 0.4 V VOHLogic “1”, 6/ 7/ ISOURCE= 100 A (VD+)-1.0 Positive analog supply current IA+2/ 7/ 8/ VA+= 5.5 V dc 1, 2, 3 All 28.0 mA Negative a

46、nalog supply current IA-2/ 7/ 8/ VA-= -5.5 V dc 1, 2, 3 All -28.0 mA See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91691 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-50

47、00 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions -55C TA +125C unless otherwise specified Group A subgroups Device type Limits 1/ Unit Min Max Positive digital supply current ID+2/ 7/ 8/ VD+= 5.5 V dc 1, 2, 3 All 15.0

48、 mA Negative digital supply current ID-2/ 7/ 8/ VD-= -5.5 V dc 1, 2, 3 All -15.0 mA Analog input capacitance in fine mode CINUnipolar mode 2/ 4/ 4 All 425 pF Bipolar mode 2/ 4/ 265 Peak harmonic or spurious noise S/PN Bipolar mode, full scale 2/ amplitude, 1 kHz input 4, 5, 6 01 94 dB 02 98 12 kHz input 2/ Bipolar mode, full scale amplitude 01 83 02 85 Signal to noise ratio S/(N+D) 0 dB input, 2/ Bipolar mode, full scale amplitude 4, 5, 6 01 87 dB 02 90 Acquisition time tACQ2/ 4/ 9/ 9 All 1.88 s Conversion time tC2/ 7/ 9, 10, 11 All 8.12 s Throughput ftp2/ 7/ 9, 10

copyright@ 2008-2019 麦多课文库(www.mydoc123.com)网站版权所有
备案/许可证编号:苏ICP备17064731号-1