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本文(DLA SMD-5962-91723 REV C-2010 MICROCIRCUIT DIGITAL ADVANCED CMOS 4-BIT PRESETTABLE BINARY COUNTER SYNCHRONOUS RESET TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf)为本站会员(registerpick115)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-91723 REV C-2010 MICROCIRCUIT DIGITAL ADVANCED CMOS 4-BIT PRESETTABLE BINARY COUNTER SYNCHRONOUS RESET TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add Radiation Hardness Assurance limits. Editorial changes throughout. jak 98-04-20 Monica L. Poelking B Add radiation features for device type 01. Add vendor CAGE F8859. Add case outline X. Add device type 02. Add table III, delta limits. Update

2、 drawing to MIL-PRF-38535 requirements. Editorial changes throughout. jak 03-03-07 Thomas M. Hess C Update boilerplate paragraphs to the current MIL-PRF-38535 requirements. - LTG 10-03-25 Thomas M. Hess REV SHET REV C C C C C C C SHEET 15 16 17 18 19 20 21 REV STATUS REV C C C C C C C C C C C C C C

3、OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Joseph A. Kerby DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED B

4、Y Thomas J. Ricciuti APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, ADVANCED CMOS, 4-BIT PRESETTABLE BINARY COUNTER, SYNCHRONOUS RESET, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON DRAWING APPROVAL DATE 92-12-23 AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-91723 SHEET 1 OF 21 DSCC FORM

5、2233 APR 97 5962-E210-10 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91723 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This

6、drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiat

7、ion Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 R 91723 01 V E A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Leadfinish (see 1.2.5) / (see 1.2

8、.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appro

9、priate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 1/ 54ACT163 4-bit presettable binary counter, synchronous reset, TTL compatible inputs 02 54ACT163 4-bit pre

10、settable binary counter, synchronous reset, TTL compatible inputs 111111111.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements f

11、or MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Termin

12、als Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line F GDFP2-F16 or CDFP3-F16 16 Flat pack X CDFP3-F16 16 Flat pack2 CQCC1-N20 20 Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device

13、class M. 1/ Due to internal noise problems, device type 01 does not meet the minimum VIHthreshold limit that is characteristic of this technology family. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91723

14、DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc Input voltage range . -0.5 V dc to VCC + 0.5 V dc Output voltage range -0.5 V dc to VCC+ 0.5 V dc DC input dio

15、de current (IIK) (-0.5 V VIN VCC+ 0.5 V) . 20 mA DC output diode current (IOK) (-0.5 V VOUT VCC+ 0.5 V) . 20 mA DC output current (IOUT) (per output pin) 50 mA DC VCCor GND current (ICC, IGND) (per pin) . 250 mA 3/ Maximum power dissipation (PD) . 500 mW Storage temperature range (TSTG) . -65C to +1

16、50C Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) +175C 4/ 1.4 Recommended operating conditions. 2/ 5/ Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Input voltage range (VIN) +0.0 V dc to VCCOutput voltage rang

17、e (VOUT) . +0.0 V dc to VCCMaximum low level input voltage (VIL) 0.8 V dc Minimum high level input voltage (VIH): Device type 01 . 3.0 V dc 6/ Device type 02 . 2.0 V dc Case operating temperature range (TC) . -55C to +125C Input edge rate (v/t) maximum (from VIN= 0.8 V to 2.0 V, 2.0 V to 0.8 V) . 12

18、5 mV/ns Maximum high level output current (IOH) .-24 mA Maximum low level output current (IOL) .+24 mA 1.5 Radiation features. Device type 01: Maximum total dose available (dose rate = 50 300 rads (Si)/s) . 100 Krads (Si) No Single Event Latch-up (SEL) at effective LET 100 MeV/(mg/cm2) 1/ Stresses a

19、bove the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise noted, all voltages are referenced to GND. 3/ For packages with multiple VCCand GND pins, this value represents the

20、maximum total current flowing into or out of all VCCand GND pins. 4/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. 5/ Unless otherwise specified, the values listed above shall apply o

21、ver the full VCCand TCrecommended operating range. 6/ For dynamic operation, a VIHlevel between 2.0 V and 3.0 V may be recognized by this device as a high logic level input. For static operation, a VIH 2.0 V will be recognized by this device as a high logic level input. Users are cautioned to verify

22、 that this will not affect their system. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91723 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 2. APPLIC

23、ABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTME

24、NT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-

25、103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2

26、Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents cited in the solicitation or contract. ELECTRONIC INDUSTRIES ALLIANCE (EIA) JEDEC Standard No. 20 - Standard for Description o

27、f 54/74ACXXXXX and 54/74ACTXXXXX Advanced High-Speed CMOS Devices. (Copies of these documents are available online at http:/www.jedec.org or from Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834). 2.3 Order of precedence. In the event of a conflict between the text of

28、this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device cla

29、sses Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M

30、 shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-P

31、RF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Log

32、ic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 State diagram. The state diagram shall be as specified on figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91723 DEFENSE SUPPLY

33、CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 3.2.6 Ground bounce waveforms and test circuit. The ground bounce waveforms and test circuit shall be as specified on figure 5. 3.2.7 Switching waveforms and test circuit. The switching waveforms and test circui

34、t shall be as specified on figure 6. 3.2.8 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing and acquiring activity upon request. 3.3 Electrical performance characteris

35、tics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical t

36、est requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD P

37、IN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device

38、class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A.

39、3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufactur

40、er in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the require

41、ments of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided

42、 with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verificatio

43、n and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit gro

44、up assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 40 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91723

45、 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test and MIL-STD-883 test method 1/ Symbol Test conditions 2/ 3/ -55C TC +125C +4.5 V VCC +5.5 V unless otherwise specified Devicetype and 4/devic

46、e class VCCGroup A subgroups Limits 5/ Unit Min Max Positive input clamp voltage 3022 VIC+6/ 7/ For input under test, IIN= 1.0 mA All Q, V 0.0 V 1 0.4 1.5 V M, D, P, L, R 01 V 0.0 V 1 0.4 1.5 Negative input clamp voltage 3022 VIC-6/ 7/ For input under test, IIN= -1.0 mA All Q, V Open 1 -0.4 -1.5 V M

47、, D, P, L, R 01 V Open 1 -0.4 -1.5 High level output voltage 3006 VOH 6/ 7/ 8/ For all inputs affecting output under test, VIH= 3.0 V, VIL= 0.8 V device 01 VIH= 2.0 V, VIL= 0.8 V device 02 For all other inputs, All All 4.5 V 1, 2, 3 4.4 V All All 5.5 V 5.4 VIN= VCCor GND IOH= -50 A M, D, P, L, R 01

48、All 5.5 V 1 5.4 For all inputs affecting output under test, VIH= 3.0 V, VIL= 0.8 V device 01 VIH= 2.0 V, VIL= 0.8 V device 02 All All 4.5 V 1, 2, 3 3.7 For all other inputs, VIN= VCCor GND M, D, P, L, R 01 All 4.5 V 1 3.7 IOH= -24 mA All All 5.5 V 1, 2, 3 4.7 For all inputs affecting output under te

49、st, VIH= 3.0 V, VIL= 0.8 V device 01 VIH= 2.0 V, VIL= 0.8 V device 02 All All 5.5 V 1, 2, 3 3.85 For all other inputs, VIN= VCCor GND 9/ IOH= -50 mA M, D, P, L, R 01 All 5.5 V 1 3.85 Low level output voltage 3007 VOL 6/ 7/ 8/ For all inputs affecting output under test, VIH= 3.0 V, VIL= 0.8 V device 01 VIH= 2.0 V,

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